D at a
S hee t
(Adva nce
In for m ation)
3. Block Diagram
Figure 3.1
S29GL-P Block Diagram
RY/BY#
DQ15
–
DQ0 (A-1)
Sector Switches
V
CC
V
SS
V
IO
RESET#
Erase Voltage
Generator
Input/Output
Buffers
WE#
WP#/ACC
BYTE#
State
Control
Command
Register
PGM Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Data
Latch
CE#
OE#
Y-Decoder
STB
Y-Gating
V
CC
Detector
Timer
Address Latch
X-Decoder
Cell Matrix
A
Max
**–A0
** A
Max
GL01GP=A25, A
Max
GL512P = A24, A
Max
GL256P = A23, A
Max
GL128P = A22
4. Physical Dimensions/Connection Diagrams
This section shows the I/O designations and package specifications for the S29GL-P.
4.1
Related Documents
The following documents contain information relating to the S29GL-P devices. Click on the title or go to
www.spansion.com download the PDF file, or request a copy from your sales office.
4.2
Special Handling Instructions for BGA Package
Special handling is required for Flash Memory products in BGA packages.
Flash memory devices in BGA packages may be damaged if exposed to ultrasonic cleaning m ethods. The
package and/or data integrity may be compromised if the package body is exposed to temperatures above
150°C for prolonged periods of time.
November 21, 2006 S29GL-P_00_A3
S29GL-P MirrorBit
TM
Flash Family
7
SPANSION [ SPANSION ]
