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S29GL064N90BFI030 参数 Datasheet PDF下载

S29GL064N90BFI030图片预览
型号: S29GL064N90BFI030
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆, 32兆3.0伏只页面模式闪存设有110纳米的MirrorBit工艺技术 [64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology]
分类和应用: 闪存
文件页数/大小: 79 页 / 3123 K
品牌: SPANSION [ SPANSION ]
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D a t a S h e e t  
„ Write an Address/Data pair to a different write-buffer-page than the one selected by the Starting Address  
during the write buffer data loading stage of the operation.  
„ Write data other than the Confirm Command after the specified number of data load cycles.  
The abort condition is indicated by DQ1 = 1, DQ7 = DATA# (for the last address location loaded), DQ6 =  
toggle, and DQ5= 0. A Write-to-Buffer-Abort Reset command sequence must be written to reset the device  
for the next operation.  
Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program  
operation is in progress.This flash device is capable of handling multiple write buffer programming operations  
on the same write buffer address range without intervening erases. For applications requiring incremental bit  
programming, a modified programming method is required; please contact your local Spansion  
representative. Any bit in a write buffer address range cannot be programmed from 0 back to a 1.  
Attempting to do so may cause the device to set DQ5=1, of cause the DQ7 and DQ6 status bits to indicate  
the operation was successful. However, a succeeding read shows that the data is still 0. Only erase  
operations can convert a 0 to a 1.  
10.4.4  
Accelerated Program  
The device offers accelerated program operations through the WP#/ACC or ACC pin depending on the  
particular product. When the system asserts VHH on the WP#/ACC or ACC pin. The device uses the higher  
voltage on the WP#/ACC or ACC pin to accelerate the operation. Note that the WP#/ACC pin must not be at  
VHH for operations other than accelerated programming, or device damage may result. WP# contains an  
internal pullup; when unconnected, WP# is at VIH.  
Figure 10.1 on page 45 illustrates the algorithm for the program operation. Refer to the Erase and Program  
Operations–AC Characteristics on page 64 for parameters, and Figure 15.3 on page 65 for timing diagrams.  
44  
S29GL-N MirrorBit® Flash Family  
S29GL-N_01_09 November 16, 2007