D at a
S hee t
18. Revision History
Section
Revision 01 (February 12, 2007)
Initial release.
Revision 02 (February 26, 2007)
Global
Page Mode Read
Erase And Programming Performance
Revision 03 (March 15, 2007)
Connection Diagrams
Revision 04 (July 6, 2007)
Ordering Information
Sector Addresses table
TSOP Pin and BGA Package
Capacitance
Revision 05 (August 10, 2007)
Ordering Information
CFI Table
Revision 06 (September 18, 2007)
Global
Change document status to Full Production
Removed 70ns access speed
Removed leaded parts
Altered Erase Block Region 1 & 2
Removed regulated V
CC
range and replaced 90 ns with 110 ns for low V
IO
option
Added Note 4 to PACKAGE MATERIAL SET Standard option
Corrected a table
Added values for TSOP
64-ball Fortified BGA (LAA 064) figure:
Changed inputs for balls F1 and F7.
Replaced LAE064 package with LAA064.
Corrected bit ranges in first paragraph.
Modified maximum sector erase time in table.
Description
Command Definitions (x16 mode) Table Corrected addresses for Program operation
Command Definitions (x8 mode) Table
Revision 07 (October 22, 2007)
Global
Primary Vendor-Specific Extended
Query Table
Revision 08 (November 2, 2007)
Primary Vendor-Specific Extended
Query Table
S29GL064N (Model 04) Bottom Boot
Sector Addresses Table
Revision 09 (November 16, 2007)
Erase and Program Operations Table
Changed t
DS
from 45 ns to 35 ns
Updated the data of CFI address 2D hex thru 34 hex.
Updated S29GL064N (Model 04) Bottom Boot Sector Addresses
Removed VID (12V) Sector protect & unprotect features
Updated the data of CFI address 45hex
Corrected addresses for Program operation
78
S29GL-N MirrorBit
®
Flash Family
S29GL-N_01_09 November 16, 2007
SPANSION [ SPANSION ]
