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S29JL064H70BAI000 参数 Datasheet PDF下载

S29JL064H70BAI000图片预览
型号: S29JL064H70BAI000
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(8M ×8位/ 4米x 16位) CMOS 3.0伏只,同步读/写闪存 [64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory]
分类和应用: 闪存
文件页数/大小: 64 页 / 1399 K
品牌: SPANSION [ SPANSION ]
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P r e l i m i n a r y
DMS (Data Management Software)
allows systems to easily take advantage
of the advanced architecture of the simultaneous read/write product line by al-
lowing removal of EEPROM devices. DMS will also allow the system software to
be simplified, as it will perform all functions necessary to modify data in file struc-
tures, as opposed to single-byte modifications. To write or update a particular
piece of data (a phone number or configuration data, for example), the user only
needs to state which piece of data is to be updated, and where the updated data
is located in the system. This is an advantage compared to systems where user-
written software must keep track of the old data location, status, logical to phys-
ical translation of the data onto the Flash memory device (or memory devices),
and more. Using DMS, user-written software does not need to interface with the
Flash memory directly. Instead, the user's software accesses the Flash memory
by calling one of only six functions.
The device offers complete compatibility with the
JEDEC 42.4 sin-
gle-power-supply Flash command set standard.
Commands are written to
the command register using standard microprocessor write timings. Reading data
out of the device is similar to reading from other Flash or EPROM devices.
The host system can detect whether a program or erase operation is complete by
using the device
status bits:
RY/BY# pin, DQ7 (Data# Polling) and DQ6/DQ2
(toggle bits). After a program or erase cycle has been completed, the device au-
tomatically returns to the read mode.
The
sector erase architecture
allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low V
CC
detector that automat-
ically inhibits write operations during power transitions. The
hardware sector
protection
feature disables both program and erase operations in any combina-
tion of the sectors of memory. This can be achieved in-system or via
programming equipment.
The device offers two power-saving features. When addresses have been stable
for a specified amount of time, the device enters the
automatic sleep mode.
The system can also place the device into the
standby mode.
Power consump-
tion is greatly reduced in both modes.
March 26, 2004 S29JL064HA1
S29JL064H
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