CY2277A
Switching Characteristics (-1, -3)
[9, 10, 11]
Parameter
t
1
Output
CPUCLK
SDRAM
USBCLK
IOCLK
REF [0,1]
IOAPIC
PCI
CPUCLK,
IOAPIC
PCI
USBCLK,
IOCLK,
REF0
SDRAM
REF1
CPUCLK
USBCLK,
IOCLK
CPUCLK
USBCLK,
IOCLK
CPUCLK
CPUCLK,
PCICLK
CPUCLK,
SDRAM
CPUCLK
SDRAM
PCICLK
USBCLK,
IOCLK
CPUCLK,
PCICLK,
SDRAM
CPU, PCI,
SDRAM
Description
Output Duty Cycle
[12]
t
1
= t
1A
Test Conditions
t
1B
Min.
45
Typ.
50
Max.
55
Unit
%
t
1
t
2
Output Duty Cycle
[12]
CPU and IOAPIC Clock
Rising and Falling Edge
Rate
PCI Clock Rising and
Falling Edge Rate
USB, I/O, REF0 Clock
Rising and Falling Edge
Rate
SDRAM Rising and
Falling Edge Rate
REF1 Rising and Falling
Edge Rate
CPU Clock Rise Time
USB Clock and I/O Clock
Rise Time
CPU Clock Fall Time
USB Clock and I/O Clock
Fall Time
CPU-CPU Clock Skew
CPU-PCI Clock Skew
(-1, -3)
CPU-SDRAM Clock
Skew
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Power-up Time
t
1
= t
1A
t
1B
40
0.75
0.75
0.75
0.8
50
55
4.0
4.0
4.0
4.0
%
V/ns
Between 0.4V and 2.0V, V
DDCPU
= 2.5V
Between 0.4V and 2.4V, V
DDCPU
= 3.3V
CPU clocks at 66.66 MHz
Between 0.4V and 2.4V, V
DDCPU
= 3.3V
Between 0.4V and 2.4V
t
2
t
2
V/ns
V/ns
t
2
t
2
t
3
t
3
t
4
t
4
t
5
t
6
t
7
t
8
t
8
t
8
t
8
t
9
Between 0.4V and 2.4V
SDRAM clocks at 66.66 MHz
Between 0.4V and 2.4V
Between 0.4V and 2.0V, V
DDCPU
= 2.5V
Between 0.4V and 2.4V, V
DDCPU
= 3.3V
Between 0.4V and 2.4V
Between 2.0V and 0.4V, V
DDCPU
= 2.5V
Between 2.4V and 0.4V, V
DDCPU
= 3.3V
Between 2.4V and 0.4V
Measured at 1.25V, V
DDCPU
= 2.5V
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks, V
DDCPU
= 2.5V
Measured at 1.25V for 2.5V clocks and
at 1.5V for 3.3V clocks
Measured at 1.5V for 3.3V clocks
Measured at 1.5V
Measured at 1.5V
CPU, PCI, and SDRAM clock stabili-
zation from power-up
Rate of change of frequency
1.0
0.5
0.4
0.5
4.0
2.0
2.13
2.0
2.5
V/ns
V/ns
ns
ns
ns
ns
ps
ns
ps
ps
ps
ps
ns
ms
0.4
0.5
2.13
2.0
2.5
100
400
6.0
775
450
650
500
1.3
3
1.0
2.0
t
10
Frequency Slew Rate
2
MHz/
ms
Notes:
9. All parameters specified with loaded outputs.
10. Over the operating range unless otherwise specified.
11. Parameters specified with: V
DDCPU
= 2.5V, V
DDQ2
= 2.5V, V
DDQ3
= 3.3V.
12. Duty cycle is measured at 1.5V when V
DD
= 3.3V. When V
DDCPU
= 2.5V, CPUCLK duty cycle is measured at 1.25V.
Rev 1.0, November 25, 2006
Page 9 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
