CY28341
Table 7. Watchdog Time Stamp
1
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
11 seconds
12 seconds
13 seconds
14 seconds
15 seconds
Byte 7: Dial-a-Frequency Control Register N
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Pin#
Name
Reserved
N6, MSB
N5
N4
N3
N2
N3
N0, LSB
Description
Reserved for device function test.
These bits are for programming the PLL’s internal N register. This access
allows the user to modify the CPU frequency at very high resolution
(accuracy). All other synchronous clocks (clocks that are generated from
the same PLL, such as PCI) remain at their existing ratios relative to the
CPU clock.
Byte 8: Silicon Signature Register (All bits are Read-only)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
1
0
0
0
Pin#
Name
Revision_ID3
Revision_ID2
Revision_ID1
Revision_ID0
Vender_ID3
Vender_ID2
Vender_ID1
Vender_ID0
Revision ID bit [3]
Revision ID bit [2]
Revision ID bit [1]
Revision ID bit [0]
Cypress Vender ID bit [3].
Cypress Vender ID bit [2].
Cypress Vender ID bit [1].
Cypress Vender ID bit [0].
Description
Byte9: Dial-A-Frequency Control Register R
Bit @Pup
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
R5, MSB
R4
R3
R2
R1
R0
DAF_ENB This Edge-trigger bit enables the Dial-a-Frequency N and R bits. It is the transition of this bit
from “0” to “1” that latches the N(6:0) and R(5:0) data into the internal N and R registers. The
user must only program a one time “1” into this bit for every new N and R values
Table 8.
FS(4:0)
XXXXX
P
96016000
Pin#
Name
Reserved
These bits are for programming the PLL’s internal R register. This access allows the user to
modify the CPU frequency at very high resolution (accuracy). All other synchronous clocks
(clocks that are generated from the same PLL, such as PCI) remain at their existing ratios
relative to the CPU clock.
Description
Dial-a-Frequency Feature
SMBus Dial-a-Frequency feature is available in this device via
Byte7 and Byte9. P is a PLL constant that depends on the
frequency selection prior to accessing the Dial-a-Frequency
feature.
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is enabled/disabled via SMBus register
Byte 1, Bit 7.
Rev 1.0, November 20, 2006
Page 8 of 19
SPECTRALINEAR [ SPECTRALINEAR INC ]
