CY28346
Absolute Maximum Ratings[5]
Storage Temperature:................................ –65qC to + 150qC
Operating Temperature:.................................... 0qC to +85qC
Maximum Power Supply:................................................ 3.5V
Input Voltage Relative to VSS:.............................. VSS – 0.3V
Input Voltage Relative to VDDQ or AVDD: .............VDD + 0.3V
Current Accuracy[6]
Parameter
Iout
Conditions
Configuration
Load
Min.
Max.
VDD = nominal (3.30V)
M0 = 0 or 1 and Rr (see Table 1)
Nominal test load for given
configuration
–7% + 7%
Inom Inom
Iout
V
DD = 3.30 5%
All combinations of M0 or 1 and Rr Nominal test load for given
(see Table 1) configuration
–12% + 12%
Inom Inom
DC Parameters (VDD = VDDA = 3.3V 5%, TA = 0°C to +70°C)
Parameter
Description
Dynamic Supply Current
Power-down Supply Current
Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
Conditions
All frequencies at maximum values[7]
Min.
Typ.
Max.
Unit
mA
mA
pF
IDD3.3V
280
IPD3.3V
PD# asserted
Note 8
CIN
5
6
COUT
LPIN
pF
7
nH
pF
CXTAL
Crystal Pin Capacitance
Measured from the XIN or XOUT pin to ground
30
36
42
AC Parameters (VDD = VDDA = 3.3V 5%, TA = 0°C to +70°C)
66 MHz 100 MHz
133 MHz
200 MHz
Parameter
Crystal
Description
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max. Unit Notes
TDC
XIN Duty Cycle
47.5
52.5
71.0
47.5
52.5
47.5
52.5
71.0
47.5
52.5
71.0
%
9, 10, 11
TPERIOD
XIN period
69.84
69.84
71.0 69.84
69.84
ns
9, 12,
13, 10
VHIGH
VLOW
TR / TF
TCCJ
XIN HIGH Voltage
0.7VDD VDD
0.7VDD VDD 0.7VDD VDD 0.7VDD VDD
V
V
XIN LOW Voltage
0
0.3VDD
10.0
0
0.3VDD
10.0
0
0.3VDD
10.0
0
0.3VDD
10.0
XIN Rise and Fall Times
XIN Cycle to Cycle Jitter
ns
ps
14
500
500
500
500
12, 15,
10
CPU at 0.7V Timing
TDC
CPUT and CPUC Duty
Cycle
45
55
45
55
45
55
45
55
5.1
100
%
ns
ps
15, 16,
19
TPERIOD
CPUT and CPUC
Period
14.85
15.3
100
9.85
10.2
100
7.35
7.65
100
4.85
15, 16,
19
TSKEW
Any CPU to CPU Clock
Skew
12, 15,
16
Notes:
5. Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
6. Inom refers to the expected current based on the configuration of the device.
7. All outputs loaded as per maximum capacitive load table.
8. Absolute value = ((Programmed CPU Iref) × (2)) + 10 mA.
9. This parameter is measured as an average over 1 Ps duration, with a crystal center frequency of 14.31818 MHz.
10. When Xin is driven from an external clock source.
11. This is required for the duty cycle on the REF clock out to be as specified. The device will operate reliably with input duty cycles up to 30/70 but the REF clock
duty cycle will not be within data sheet specifications.
12. All outputs loaded as perTable 9 below.
13. Probes are placed on the pins and measurements are acquired at 1.5V for 3.3V signals (see test and measurement set-up section of this data sheet).
14. Measured between 0.2V and 0.7V
.
DD
15. This measurement is applicable with Spread ON or Spread OFF.
DD
16. Measured at crossing point (Vx) or where subtraction of CLK–CLK# crosses 0V Measured from V = 0.175V to V = 0.525V.
OH
OL
17. Measured from V = 0.175V to V = 0.525V.
OL
OH
18. Determined as a fraction of 2*(Trise–Tfall)/ (Trise+Tfall).
19. Test load is Rta = 33.2:, Rd = 49.9:.
Rev 1.0,November 24, 2006
Page 14 of 19
SPECTRALINEAR [ SPECTRALINEAR INC ]
