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CY28359 参数 Datasheet PDF下载

CY28359图片预览
型号: CY28359
PDF下载: 下载PDF文件 查看货源
内容描述: 273 MHz的6输出缓冲的DDR400的DIMM [273 MHz 6 Output Buffer for DDR400 DIMMS]
分类和应用: 双倍数据速率
文件页数/大小: 7 页 / 129 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28359
Serial Configuration Map
• The Serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Reserved and unused bits should be programmed to “0”.
SMBus Address for the CY28359 when SEL_ADDR=1:
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
----
SMBus Address for the CY28359 when SEL_ADDR=0:
A6
1
A5
1
A4
0
A3
1
A2
1
A1
1
A0
0
R/W
----
Byte 22: Outputs Active/Inactive Register (1 = Active, 0 = Three-state), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
--
24, 25
--
--
--
9
1
Pin #
Description
Input Threshold Control00: Normal (1.25V)
01: 1.20V
10: 1.15V
11: 1.35V
FBOUTA
0 = Enable, 1 = Disable
FBOUTB
0 = Enable, 1 = Disable
Reserved, drive to 0
Reserved, drive to 0
DDRBT2, DDRBC2
Reserved, drive to 0
Default
0
0
0
0
1
1
1
1
Byte 23: Outputs Active/Inactive Register(1 = Active, 0 = Three-state), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
5,6
3,4
21,20
--
14,15
12,13
--
--
Pin #
DDRBT1, DDRBC1
DDRBT0, DDRBC0
DDRAT2, DDRAC2
Reserved, drive to 0
DDRAT1, DDRAC1
DDRAT0, DDRAC0
Reserved, drive to 0
Reserved, drive to 0
Description
Default
1
1
1
1
1
1
1
1
Rev 1.0, November 24, 2006
Page 4 of 7