CY28378
Byte 9
Bit
Bit 7
@Pup
0
Name
48MHz_DRV
Pin Description
48MHz and 24_48MHz clock output drive strength
0 = Normal
1 = High Drive
(Recommend to set to high drive if this output is being used to drive both
USB and SIO devices in Intel Brookdale – G platforms)
PCI clock output drive strength
0 = Normal
1 = High Drive
3V66 clock output drive strength
0 = Normal
1 = High Drive
Reserved
Reserved
Reserved
Reserved
Reserved
Name
CPU_Skew2
CPU_Skew1
CPU_Skew0
CPU skew control
000 = Normal
001 = –150 ps
010 = –300 ps
011 = –450 ps
100 = +150 ps
101 = +300 ps
110 = +450 ps
111 = +600 ps
3V66 and PCI output frequency select mode
0 = Set according to Frequency Selection Table
1 = Set according to Fractional Aligner settings
Bit 6
0
PCI_DRV
Bit 5
0
3V66_DRV
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 10
Bit
Bit 7
Bit 6
Bit 5
0
0
0
0
0
@Pup
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Pin Description
Bit 4
0
Fixed 3V66_SEL
Bit 3
Bit 2
0
0
PCI_Skew1
PCI_Skew0
PCI skew control
00 = Normal
01 = –500 ps
10 = Reserved
11 = +500 ps
3V66 skew control
00 = Normal
01 = –150 ps
10 = +150 ps
11 = +300 ps
Pin Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Bit 1
Bit 0
0
0
3V66_Skew1
3V66_Skew0
Byte 11
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
@Pup
0
0
0
0
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
Rev 1.0, November 20, 2006
Page 9 of 21
SPECTRALINEAR [ SPECTRALINEAR INC ]
