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CY28405OXC 参数 Datasheet PDF下载

CY28405OXC图片预览
型号: CY28405OXC
PDF下载: 下载PDF文件 查看货源
内容描述: CK409兼容的时钟合成器 [CK409-Compliant Clock Synthesizer]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 18 页 / 198 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28405
Byte 14: Control Register 14
Bit
7
@Pup
0
FS_(E:A)
Name
Description
FS_Override
0 = Select operating frequency by FS(E:A) input pins
1 = Select operating frequency by FSEL(4:0) settings
Reserved, Set = 1
Reserved, Set = 0
Reserved, Set = 0
Reserved, Set = 0
Reserved, Set = 0
Reserved, Set = 0
Programmable output frequencies enabled
0 = Disabled, 1 = Enabled
6
5
4
3
2
1
0
1
0
0
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Pro_Freq_EN
Dial-a-Frequency Programming
When the programmable output frequency feature is enabled
(Pro_Freq_EN bit is set), the CPU output frequency is deter-
mined by the following equation:
Fcpu = G * N/M
“N” and “M” are the values programmed in Programmable
Frequency Select N-Value Register and M-Value Register,
respectively.
“G” stands for the PLL Gear Constant, which is determined by
the programmed value of FS[E:A] or SEL[4:0]. The value is
listed in
Table 1.
The ratio of N and M need to be greater than “1” [N/M> 1].
The following table lists set of N and M values for different
frequency output ranges. This example use a fixed value for
the M-Value Register and select the CPU output frequency by
changing the value of the N-Value Register.
Table 5. Examples of N and M Value for Different CPU
Frequency Range
Fixed Value
for M-Value
Register
48
48
48
Range of N-Value
Register for
Different CPU
Frequency
200 – 250
189 – 249
167 – 200
Crystal Recommendations
The CY28405 requires a
Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28405 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
Figure 1
shows a typical crystal configuration using the two
trim capacitors. An important clarification for the following
discussion is that the trim capacitors are in series with the
crystal not parallel. It’s a common misconception that load
capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is
not true.
Frequency
Ranges
100 –125
Gear
Constants
24004009.32
126 – 166 32005345.76
167 – 200 48008018.65
Table 6. Crystal Recommendations
Frequency
(Fund)
14.31818 MHz
Cut
AT
Loading Load Cap
Parallel
20 pF
Drive
(max.)
0.1 mW
Shunt Cap
(max.)
5 pF
Motional
(max.)
0.016 pF
Tolerance
(max.)
50 ppm
Stability
(max.)
50 ppm
Aging
(max.)
5 ppm
Rev 1.0, November 20, 2006
Page 10 of 18