CY28416
Next Generation FTG for Intel
®
Architecture
Features
• Supports Intel Pentium
®
4-Type CPUs
• Selectable CPU Frequencies
• Two Differential CPU Clock Pairs
• Four 100 MHz Differential SRC Clock Pairs
• One CPU/SRC Selectable Differential Clock Pair
• One 96 MHz Differential Dot Clock Support
• Two 48 MHz Clocks
• Four 33 MHz PCI Clocks
CPU
x2 / x3
SRC
x4 / x5
PCI
x6
DOT
x1
USB
x2
REF
x2
• Two 33 MHz PCI Free Running Clocks
• Low Voltage Frequency Select Input
• I
2
C Support Byte/Word/Block Read/Write Capabilities
• Ideal Lexmark Spread Spectrum Profile for Maximum
EMI Reduction
• 3.3V Power Supply
• 48-pin SSOP Package
Block Diagram
XIN
XOUT
Pin Configuration
VDD_REF
REF
XTAL
OSC
PLL1
PLL Ref Freq
Divider
Network
VDD_CPU
CPUT[0:1], CPUC[0:1],
CPU2/SRC4
VDD_SRC
SRCT[0:3], SRCC[0:3]
FS_[C:A]
VTT_PWRGD#
IREF
VDD_PCI
PCI[0:3]
VDD_PCIF
PCIF[0:1]
PD
VDD_48MHz
PLL2
DOT96T
DOT96C
48MHz0
48MHz1
SDATA
SCLK
I
2
C
Logic
SCLK
SDATA
XOUT
XIN
VSS_REF
REF1/FS_A
REF0/FS_C
VDD_REF
PCI0
PCI1
VDD_PCI
VSS_PCI
PCI2
PCI3
VSS_PCI
VDD_PCI
PCIF0/TESTSEL
PCIF1/ITPEN
VDD_48
48MHz0/FS_B
48MHz1
VSS_48
DOT96T
DOT96C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VSS_CPU
CPUT0
CPUC0
VDD_CPU
CPUT1
CPUC1
IREF
VSSA
VDDA
CPUT2_ITP/SRCT4
CPUC2_ITP/SRCC4
VDD_SRC
VSS_SRC
SRCT3
SRCC3
VDD_SRC
SRCC2_SATA
SRCT2_SATA
SRCC1
SRCT1
VSS_SRC
SRCC0
SRCT0
VTT_PWRGD#/PD
48-PIN SSOP
CY28416
Rev 1.0, November 22, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555
Fax:(408) 855-0550
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