PRELIMINARY
CY28SRC01
PCI-Express Clock Generator
Features
• One 100 MHz differential SRC clocks
• Low-voltage frequency select input
• I
2
C support with readback capabilities
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 3.3V power supply
• 16-pin TSSOP package
Pin Configuration
Block Diagram
XIN
XOUT
XTAL
OSC
PLL
PLL Ref Freq
Divider
Network
VDD_SRC
SRCT0,SRCC0
VSS_SRC
VDD_SRC
SRCC0
SRCT0
VDD_SRC
VSS_SRC
IREF
VSSA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD_SRC
SDATA
SCLK
XOUT
XIN
VDD_REF
VSS_REF
VDDA
16 TSSOP
IREF
SDATA
SCLK
I
2
C
Logic
Pin Description
Pin No.
7
14
15
3,4
Name
IREF
SCLK
SDATA
SRC[T/C]0
Type
I
I,PU
Description
A precision resistor (475 ) attached to this pin is connected to the internal current
reference.
SMBus compatible SCLOCK.This pin has an internal pull-up, but is tri-stated in
powerdown.
I/O, PU SMBus compatible SDATA.This pin has an internal pull-up, but is tri-stated in
powerdown.
O, DIF Differential Selectable Serial reference clock.
Intel Type-X buffer.
Includes overclock support through SMBUS
I
O
PWR
GND
PWR
GND
PWR
GND
14.318-MHz Crystal Input
14.318-MHz Crystal Output
3.3V power supply for SRC outputs
Ground for SRC outputs
3.3V power supply for PLL
Analog Ground
Power for Xtal
Ground for Xtal
12
13
2, 5,16
1,6
9
8
11
10
XIN
XOUT
VDD_SRC
VSS_SRC
VDDA
VSSA
VDD_REF
VSS_REF
Rev 1.0, November 20, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555
Fax:(408) 855-0550
Page 1 of 9
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