CY2SSTV16857
Slew Rate
The following table describes output-buffer slew-rate charac-
teristics that are sufficient to meet the requirements of regis-
tered DDR DIMM performance and timings. These character-
istics are not necessarily production tested but can be
guaranteed by design or characterization. Compliance with
these rates is not mandatory if it can be adequately demon-
strated that alternate characteristics meet the requirements of
the registered DDR DIMM application. This information does
not necessarily have to appear in the device data sheet.
Obtain rise and fall time measurements by using the same
procedure for obtaining “Ramp” data according to the current
WIA IBIS specification. In particular it is very important to note
that the following slew rates are specified at the output of the
die, without package parasitics in the power, ground or output
paths. The measurement points are at 20% and 80%. The
slew-rate test load shall be a 50-ohm resistor to GND for Rise
and a 50-ohm resistor to V
DDQ
for fall. The dV/dt ratio is
reduced to V/ns.
Table 5. Output Buffer Slew-Rate Characteristics
dV/dt
Rise
Fall
Min.
0.85 V/ns
1.00 V/ns
Max.
4 V/ns
4 V/ns
LVCMOS
RESET
Input
IDD
t
inact
10%
VDD/2
VDD/2
t
act
90%
IDDH
IDDL
VDD
0V
Figure 2. Voltage Waveforms Enable and Disable Times
Low- and High-level Enabling
[11]
VI(PP)
Input
t
PLH
VTT
Output
VICR
VICR
t
PHL
VTT
VOH
VOL
Figure 3. Voltage Waveforms Propagation Delay Times
[12]
Test Configurations
[9, 10]
V
DD
= 2.5V ±0.2V
Timing Diagrams
LVCMOS
RESET
Input
VI(PP)
VICR
VIH
VDD/2
t
PHL
VIL
Timing Input
t
su
Output
VTT
VOH
VOL
t
h
VIH**
VIL***
Figure 4. Voltage Waveforms Propagation Delay Times
[11
VTT
F ro m
O u tp u t
U nder
Test
R L = 50 O hm
T e s t P o in t
C L = 30 pF
Figure 5. Load Circuit
[8]
Data Input
VREF*
VREF*
Figure 1. Voltage Waveforms Set-up and Hold
Times
[11, 13, 14]
t
w
Input
VREF*
VREF*
VIH**
VIL***
Figure 6. Voltage Waveforms Pulse Duration
[13, 14]
Notes:
8. CL includes probe and jig capacitance.
9. IDD tested with clock and data inputs held at VDD or VSS, and IO = 0 mA.
10. All input pulses are supplied by generators having the following characteristics: PRR < 10 MHz, ZO = 50 ohm input slew rate = 1 V/ns ±20% (unless otherwise
specified).
11. the outputs are measured one at a time with one transition per measurement.
12. *VTT = VREF = VDDQ/2.
13. **VIH = VREF + 350 mV (AC voltage levels).
14. ***VIL = VREF – 350 mV (AC voltage levels).
Rev 1.0, November 21, 2006
Page 6 of 7
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