SL38000
Programmable Output Clock (CLKOUT) Rise and Fall Times
The output clock rise and fall times (tr/tf) of each clock output can be programmed independently to match drive level
to load impedance.
Programming
Code
000
001
010
011
100
101
110
VDDO=3.3V
CL=15pF
4.00
2.00
1.40
1.10
0.85
0.70
0.55
VDDO=2.5V
CL=15pF
4.80
2.60
1.80
1.40
1.10
0.90
0.70
VDDO=1.8V
CL=15pF
5.60
3.20
2.20
1.70
1.40
1.10
0.90
Unit
ns
ns
ns
ns
ns
ns
ns
Table 1. Programmable CLKOUT Rise and Fall Times
Notes:
1. All typical values are at respective nominal VDD values.
2. The worst case rise and fall times variations are +/- 20% for C-Grade and +/-30% for I-grade.
I2C-Bus Timing Specifications
PARAMETER
SCL Clock
Frequency
START hold
time
SCLK LOW
period
SCLK HIGH
period
START Set-
up time
SDA set-up
time
SDA/SCLK
rise time
SYMBOL
f
SCL
t
HD;STA
t
LOW
t
HIGH
t
SU;DAT
t
SU;DAT
t
R
STANDARD-MODE
MIN.
0
4.0
4.7
4.0
4.7
250
-
MAX.
100
-
-
-
-
-
1000
FAST-MODE
MIN.
0
0.6
1.3
0.6
0.6
100
-
MAX.
400
-
-
-
-
-
300
UNIT
kHz
μs
μs
μs
μs
ns
ns
Rev 1.1, August 7, 2008
Page 8 of 12
SPECTRALINEAR [ SPECTRALINEAR INC ]
