W144
440BX AGPset Spread Spectrum Frequency Synthesizer
Features
• Maximized electromagnetic interference (EMI)
suppression using Cypress’ Spread Spectrum
technology
• Single chip system frequency synthesizer for Intel
®
440BX AGPset
• Two copies of CPU output
• Six copies of PCI output 1
• One 48 MHz output for USB
• One 24 MHz output for SIO
• Two buffered reference outputs
• One IOAPIC output
• Thirteen SDRAM outputs provide support for three
DIMMs
• Supports frequencies up to 150 MHz
• I
2
C interface for programming
• Power management control inputs
Table 1. Pin Selectable Frequency
Input Address
CPU_F, CPU1
FS3 FS2 FS1 FS0
(MHz)
PCI_F, 1:5 (MHz)
1
1
1
1
133.6
33.4 (CPU/4)
1
1
1
0
124
31 (CPU/4)
1
1
0
1
150
37.5 (CPU/4)
1
1
0
0
140
35 (CPU/4)
1
0
1
1
105
35 (CPU/3)
1
0
1
0
110
36.7 (CPU/3)
1
0
0
1
115
38.3 (CPU/3)
1
0
0
0
120
40 (CPU/3)
0
1
1
1
100.2
33.4 (CPU/3)
0
1
1
0
133.3
44.43 (CPU/3)
0
1
0
1
112
37.3 (CPU/3)
0
1
0
0
103
34.3 (CPU/3)
0
0
1
1
66.8
33.4 (CPU/2)
0
0
1
0
83.3
41.7 (CPU/2)
0
0
0
1
75
37.5 (CPU/2)
0
0
0
0
124
41.3 (CPU/3)
Logic Block Diagram
VDDQ3
REF0/(PCI_STOP#)
X1
X2
XTAL
OSC
PLL Ref Freq
Pin Configuration
[1]
REF1/FS2
VDDQ2
IOAPIC
VDDQ2
I/O Pin
Control
Stop
Clock
Control
CLK_STOP#
PLL 1
÷2,3,4
Stop
Clock
Control
CPU1
CPU_F
VDDQ3
PCI_F/MODE
PCI1/FS3
PCI2
PCI3
PCI4
PCI5
VDDQ3
48MHz/FS0
÷2
Stop
Clock
Control
SDATA
SCLK
I
2
C
Logic
PLL2
VDDQ3
REF0/(PCI_STOP#)
GND
X1
X2
VDDQ3
PCI_F/MODE
**PCI1/FS3
GND
PCI2
PCI3
PCI4
PCI5
VDDQ3
SDRAMIN
GND
SDRAM11
SDRAM10
VDDQ3
SDRAM9
SDRAM8
GND
2
SDATA
I C
SCLK
{
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VDDQ2
IOAPIC
REF1/FS2*
GND
CPU_F
CPU1
VDDQ2
CLK_STOP#
SDRAM_F
GND
SDRAM0
SDRAM1
VDDQ3
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDDQ3
SDRAM6
SDRAM7
VDDQ3
48MHz/FS0*
24MHz/FS1*
W144
SDRAMIN
Stop
Clock
Control
24MHz/FS1
VDDQ3
SDRAM0:11
12
SDRAM_F
Note:
1. * Has an internal pull-up resistors. It should not be relied upon for setting I/O pins HIGH. Pin function with parentheses determined by MODE pin resistor strapping
while ** has an internal pull down resistor.
Rev 1.0, November 21, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555
Fax:(408) 855-0550
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