W320-03
200 MHz Spread Spectrum Clock Synthesizer/Driver
with Differential CPU Outputs
Features
• Compliant with Intel
®
CK-Titan Clock Synthe-
sizer/Driver Specifications
• Multiple output clocks at different frequencies
• Three pairs of differential CPU outputs, up to 200 MHz
• Ten synchronous PCI clocks, three free-running
• Six 3V66 clocks
• Two 48 MHz clocks
• One reference clock at 14.318 MHz
• One VCH clock
• Spread Spectrum clocking (down spread)
• Power-down features (PCI_STOP#, CPU_STOP#
PWR_DWN#)
• Three Select inputs (Mode select & IC Frequency
Select)
• OE and Test Mode support
• 56-pin SSOP package and 56-pin TSSOP package
Benefits
• Supports next-generation Pentium
®
processors using
differential clock drivers
• Motherboard clock generator
• Support Multiple CPUs and a chipset
• Support for PCI slots and chipset
• Supports AGP, DRCG reference and Hub Link
• Supports USB host controller and graphic controller
• Supports ISA slots and I/O chip
• Enables reduction of electromagnetic interference
(EMI) and overall system cost
• Enables ACPI-compliant designs
• Supports up to four CPU clock frequencies
• Enables ATE and “bed of nails” testing
• Widely available, standard package enables lower cost
Logic Block Diagram
VDD_REF
PWR
Pin Configurations
SSOP & TSSOP
Top View
VDD_REF
XTAL_IN
XTAL_OUT
GND_REF
PCI_F0
PWR
Stop
Clock
Control
X1
X2
XTAL
OSC
REF
1
2
3
4
5
6
7
8
9
10
11
56
55
54
53
52
51
50
49
48
47
46
REF
S1
S0
CPU_STOP#
CPU0
CPU#0
VDD_CPU
CPU1
CPU#1
GND_CPU
VDD_CPU
CPU2
CPU#2
MULT0
IREF
GND_IREF
S2
USB
DOT
VDD_ 48 MHz
GND_ 48 MHz
3V66_1/VCH
PCI_STOP#
3V66_0
VDD_3V66
GND_3V66
SCLK
SDATA
PLL Ref Freq
PLL 1
S0:2
PWR_GD#
CPU_STOP#
Divider
Network
VDD_CPU
CPU0:2
CPU#0:2
PCI_F1
PCI_F2
VDD_PCI
GND_PCI
PCI0
PCI1
PCI2
PCI3
VDD_PCI
Gate
PWR
Stop
Clock
Control
VDD_PCI
PCI_F0:2
PCI0:6
W320-03
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
PCI_STOP#
/2
PWR_DWN#
VDD_3V66
3V66_0
PWR
PWR
GND_PCI
PCI4
PCI5
PCI6
VDD_3V66
GND_3V66
66BUFF0/3V66_2
66BUFF1/3V66_3
66BUFF2/3V66_4
66IN/3V66_5
PWR_DWN#
VDD_CORE
GND_CORE
PWR_GD#
3V66_2:4/
66BUFF0:2
3V66_5/ 66IN
PLL 2
VDD_48MHz
PWR
USB (48MHz)
DOT (48MHz)
VCH_CLK/ 3V66_1
SDATA
SCLK
SMBus
Logic
Rev 1.0, November 25, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555
Fax:(408) 855-0550
Page 1 of 16
www.SpectraLinear.com
SPECTRALINEAR [ SPECTRALINEAR INC ]
