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W40S11-02H 参数 Datasheet PDF下载

W40S11-02H图片预览
型号: W40S11-02H
PDF下载: 下载PDF文件 查看货源
内容描述: SDRAM缓冲区 - 2 DIMM (手机) [SDRAM Buffer - 2 DIMM (Mobile)]
分类和应用: 逻辑集成电路光电二极管驱动动态存储器手机
文件页数/大小: 9 页 / 129 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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W40S11-02
SDRAM Buffer - 2 DIMM (Mobile)
Features
• Ten skew-controlled CMOS outputs (SDRAM0:9)
• Supports two SDRAM DIMMs
• Ideal for high-performance systems designed around
Intel®’s latest mobile chip set
• SMBus serial configuration interface
• Skew between any two outputs is less than 250 ps
• 1 to 5 ns propagation delay
• DC to 133-MHz operation
• Single 3.3V supply voltage
• Low power CMOS design packaged in a 28-pin, 209-mil
SSOP (Shrink Small Outline Package)
Key Specifications
Supply Voltages: ........................................... V
DD
= 3.3V±5%
Operating Temperature:.................................... 0°C to +70°C
Input Threshold:...................................................1.5V typical
Maximum Input Voltage: ...................................... V
DD
+ 0.5V
Input Frequency:...............................................0 to 133 MHz
BUF_IN to SDRAM0:9 Propagation Delay:........ 1.0 to 5.0 ns
Output Edge Rate: ................................................. >1.5 V/ns
Output Skew: ............................................................ ±250 ps
Output Duty Cycle:...................................45/55% worst case
Output Impedance: ....................................... 15 ohms typical
Output Type: ............................................... CMOS rail-to-rail
Overview
The Cypress W40S11-02 is a low-voltage, ten-output clock
buffer. Output buffer impedance is approximately 15 , which
is ideal for driving SDRAM DIMMs.
Block Diagram
Pin Configuration
SDATA
SCLOCK
Serial Port
Device Control
OE
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
VDD
SDRAM0
SDRAM1
GND
VDD
SDRAM2
SDRAM3
GND
BUF_IN
VDD
SDRAM8
GND
VDD
SDATA
[1]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
SDRAM7
SDRAM6
GND
VDD
SDRAM5
SDRAM4
GND
OE
[1]
VDD
SDRAM9
GND
GND
SCLOCK
[1]
BUF_IN
SDRAM9
Note:
1. Internal pull-up resistor of 250K on SDATA, SCLOCK, and OE in-
puts (should not be relied upon for pulling up to V
DD
).
Rev 1.0, Dec. 01, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555
Fax:(408) 855-0550
Page 1 of 9
www.SpectraLinear.com