64 Mbit SPI Serial Dual I/O Flash
SST25VF064C
SST25VF032B32Mb Serial Peripheral Interface (SPI) flash memory
Data Sheet
FEATURES:
• Single Voltage Read and Write Operations
– 2.7-3.6V
• Serial Interface Architecture
– SPI Compatible: Mode 0 and Mode 3
• Dual Input/Output Support
– Fast-Read Dual-Output Instruction
– Fast-Read Dual I/O Instruction
• High Speed Clock Frequency
– 80 MHz for High-Speed Read (0BH)
– 75 MHz for Fast-Read Dual-Output (3BH)
– 50 MHz for Fast-Read Dual I/O (BBH)
– 33 MHz for Read Instruction (03H)
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
– Active Read Current: 12 mA (typical @ 80 MHz) for
single-bit read)
– Active Read Current: 14 mA (typical @ 75MHz) for
dual-bit read)
– Standby Current: 5 µA (typical)
• Flexible Erase Capability
– Uniform 4 KByte sectors
– Uniform 32 KByte overlay blocks
– Uniform 64 KByte overlay blocks
• Fast Erase
– Chip-Erase Time: 35 ms (typical)
– Sector-/Block-Erase Time: 18 ms (typical)
• Page-Program
– 256 Bytes per page
– Single and Dual Input support
– Fast Page-Program time in 1.5 ms (typical)
• End-of-Write Detection
– Software polling the BUSY bit in Status Register
• Write Protection (WP#)
– Enables/Disables the Lock-Down function of the
status register
• Software Write Protection
– Write protection through Block-Protection bits in sta-
tus register
• Security ID
– One-Time Programmable (OTP) 256 bit, Secure ID
- 64 bit Unique, Factory Pre-Programmed identifier
- 192 bit User-Programmable
• Temperature Range
– Commercial = 0°C to +70°C
– Industrial: -40°C to +85°C
• Packages Available
– 16-lead SOIC (300 mils)
– 8-contact WSON (6mm x 8mm)
– 8-lead SOIC (200 mils)
• All devices are RoHS compliant
PRODUCT DESCRIPTION
The SST 25 series Serial Flash family features a four-wire,
SPI-compatible interface that allows for a low pin-count
package which occupies less board space and ultimately
lowers total system costs. SST25VF064C SPI serial flash
memory is manufactured with SST proprietary, high-perfor-
mance CMOS SuperFlash technology. The split-gate cell
design and thick-oxide tunneling injector attain better reli-
ability and manufacturability compared with alternate
approaches.
The SST25VF064C significantly improves performance
and reliability, while lowering power consumption. The
device writes (Program or Erase) with a single power sup-
ply of 2.7-3.6V. The total energy consumed is a function of
the applied voltage, current, and time of application. Since
for any given voltage range, the SuperFlash technology
uses less current to program and has a shorter erase time,
the total energy consumed during any Erase or Program
operation is less than alternative flash memory technolo-
gies.
The SST25VF064C device is offered in 16-lead SOIC (300
mils), 8-contact WSON (6mm x 8mm), and 8-lead SOIC
(200 mils) packages. See Figure 2 for pin assignments.
©2010 Silicon Storage Technology, Inc.
S71392-04-000
04/10
1
The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.
SST [ SILICON STORAGE TECHNOLOGY, INC ]
