2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
Data Sheet
TABLE 2: Pin Description
Symbol
A
MS1
-A
0
DQ
15
-DQ
0
Pin Name
Address Inputs
Data Input/output
Functions
To provide memory addresses. During Sector-Erase A
MS
-A
11
address lines will select the
sector. During Block-Erase A
MS
-A
15
address lines will select the block.
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
To activate the device when CE# is low.
To gate the data output buffers.
To control the Write operations.
To provide power supply voltage:
3.0-3.6V for SST39LF200A/400A/800A
2.7-3.6V for SST39VF200A/400A/800A
CE#
OE#
WE#
V
DD
V
SS
NC
Chip Enable
Output Enable
Write Enable
Power Supply
Ground
No Connection
Unconnected pins.
T2.2 1117
1. A
MS
= Most significant address
A
MS
= A
16
for SST39LF/VF200A, A
17
for SST39LF/VF400A, and A
18
for SST39LF/VF800A
TABLE 3: Operation Modes Selection
Mode
Read
Program
Erase
Standby
Write Inhibit
Product Identification
Software Mode
V
IL
V
IL
V
IH
See Table 4
T3.4 1117
CE#
V
IL
V
IL
V
IL
V
IH
X
X
OE#
V
IL
V
IH
V
IH
X
V
IL
X
WE#
V
IH
V
IL
V
IL
X
X
V
IH
DQ
D
OUT
D
IN
X
1
High Z
High Z/ D
OUT
High Z/ D
OUT
Address
A
IN
A
IN
Sector or Block address,
XXH for Chip-Erase
X
X
X
1. X can be V
IL
or V
IH
, but no other value.
©2007 Silicon Storage Technology, Inc.
S71117-09-000
2/07
7
SST [ SILICON STORAGE TECHNOLOGY, INC ]
