512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
INTERNAL PROGRAM OPERATION STARTS
TBP
ADDRESS AMS-0
5555
TAH
TCP
CE#
TAS
OE#
TCH
WE#
TCS
DQ7-0
AA
SW0
Note:
55
SW1
A0
SW2
DATA
BYTE
(ADDR/DATA)
TCPH
TDS
2AAA
5555
ADDR
TDH
395 ILL F05.0
AMS = Most significant address
AMS = A15 for SST39LF/VF512, A16 for SST39LF/VF010,
A17 for SST39LF/VF020 and A18 for SST39LF/VF040
FIGURE 6: CE# C
ONTROLLED
P
ROGRAM
C
YCLE
T
IMING
D
IAGRAM
ADDRESS AMS-0
TCE
CE#
TOEH
OE#
TOE
WE#
TOES
DQ7
Note:
D
D#
D#
D
395 ILL F06.0
AMS = Most significant address
AMS = A15 for SST39LF/VF512, A16 for SST39LF/VF010,
A17 for SST39LF/VF020 and A18 for SST39LF/VF040
FIGURE 7: D
ATA
# P
OLLING
T
IMING
D
IAGRAM
©2001 Silicon Storage Technology, Inc.
S71150-03-000 6/01
395
11