FlashFlex MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
Data Sheet
3.5 Dual Data Pointers
The device has two 16-bit data pointers. The DPTR Select (DPS) bit in AUXR1 determines which of the two data
pointers is accessed. When DPS=0, DPTR0 is selected; when DPS=1, DPTR1 is selected. Quickly switching
between the two data pointers can be accomplished by a single INC instruction on AUXR1. (See Figure 3-3)
AUXR1 / bit0
DPS
DPTR1
DPTR0
DPH
83H
DPL
82H
DPS = 0
→
DPTR0
DPS = 1
→
DPTR1
External Data Memory
1273 F03.0
FIGURE
3-3: Dual Data Pointer Organization
3.6 Special Function Registers
Most of the unique features of the FlashFlex microcontroller family are controlled by bits in special function regis-
ters (SFRs) located in the SFR memory map shown in Table 3-4. Individual descriptions of each SFR are provided
and reset values indicated in Tables 3-5 to 3-9.
TABLE
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
3-4: FlashFlex SFR Memory Map
8 BYTES
IP1
1
B
1
IEA
1
ACC
1
CCON
1
PSW
1
T2CON
1
WDTC
1
IP
1
P3
1
IE
1
P2
1
SCON
1
P1
1
TCON
1
P0
1
TMOD
SP
TL0
DPL
TL1
DPH
TH0
TH1
WDTD
AUXR
SPDR
PCON
SBUF
SADEN
SFCF
SADDR
SFCM
SPSR
AUXR1
P4
SFAL
SFAH
SFDT
SFST
XICON
IPH
T2MOD
RCAP2L
RCAP2H
TL2
CMOD
CCAPM0
CCAPM1
CCAPM2
CCAPM3
SPCR
TH2
CCAPM4
CL
CCAP0L
CCAP1L
CCAP2L
CCAP3L
CCAP4L
CH
CCAP0H
CCAP1H
CCAP2H
CCAP3H
CCAP4H
IP1H
FFH
F7H
EFH
E7H
DFH
D7H
CFH
C7H
BFH
B7H
AFH
A7H
9FH
97H
8FH
87H
T3-4.0 1273
1. Bit addressable SFRs
©2007 Silicon Storage Technology, Inc.
S71273-03-000
1/07
16
SST [ SILICON STORAGE TECHNOLOGY, INC ]
