P Channel Enchancement Mode MOSFET
-1.7A
DESCRIPTION
ST2303
The ST2303 is the P-Channel logic enhancement mode power field effect transistor are
produced using high cell density, DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage application such as cellular phone and
notebook computer power management and other batter powered circuits, and low in-line
power loss are needed in a very small outine surface mount package.
PIN CONFIGURATION
SOT-23-3L
3
FEATURE
-
30V/-2.6A, R
DS(ON)
= 130m-ohm
D
G
1
1.Gate
2.Source
S
2
3.Drain
@VGS = -10V
-30V/-2.0A, R
DS(ON)
= 180m-ohm
@VGS = -4.5V
Super high density cell design for
extremely low R
DS(ON)
Exceptional on-resistance and maximum
DC current capability
SOT-23-3L package design
3
S03YA
1
S: Subcontractor
2
Y: Year Code
W: Process Code
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
TEL: (650) 9389294 FAX: (650) 9389295
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