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S4261S2.7S 参数 Datasheet PDF下载

S4261S2.7S图片预览
型号: S4261S2.7S
PDF下载: 下载PDF文件 查看货源
内容描述: 双电压监控电路,看门狗定时器 [Dual Voltage Supervisory Circuit With Watchdog Timer]
分类和应用: 监控
文件页数/大小: 16 页 / 105 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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S4242/S42WD42/S4261/S42WD61
Acknowledge Polling
When the S42xxx is performing an internal WRITE opera-
tion, it will ignore any new START conditions. Since the
device will only return an acknowledge after it accepts the
START, the part can be continuously queried until an
acknowledge is issued, indicating that the internal WRITE
cycle is complete.
To poll the device, give it a START condition, followed by
a slave address for a WRITE operation (See Figure 9).
Internal WRITE Cycle
In Progress;
Begin ACK Polling
READ OPERATIONS
Read operations are initiated with the R/W bit of the
identification field set to “1.” There are four different read
options:
1.
2.
3.
4.
Current Address Byte Read
Random Address Byte Read
Current Address Sequential Read
Random Address Sequential Read
Issue Start
Issue Slave
Address and
R/W = 0
Issue Stop
Current Address Byte Read
The S42xxx contains an internal address counter which
maintains the address of the last word accessed,
incremented by one. If the last address accessed (either
a read or write) was to address location n, the next read
operation would access data from address location n+1
and increment the current address pointer. When the
S42xxx receives the slave address field with the R/W bit
set to “1,” it issues an acknowledge and transmits the 8-
bit word stored at address location n+1.
The current address byte read operation only accesses a
single byte of data. The master does not acknowledge the
transfer, but does generate a stop condition. At this point,
the S42xxx discontinues data transmission. See
Figure 12 for the address acknowledge and data transfer
sequence.
ACK
Returned?
No
Yes (Internal WRITE Cycle is completed)
Next
operation a
WRITE?
Yes
Issue Byte
Address
Issue Stop
No
Proceed with
WRITE
Await Next
Command
2025 ILL11.0
FIGURE 11. ACKNOWLEDGE POLLING
SDA Bus Activity
1
A A A R
10 9 8 W
A
C
K
Data Byte
1 0 1 0
1
D D D D D D D D
7 6 5 4 3 2 1 0
1
S
T
O
P
S
T
Device
Type
A10,A9,A8
A
Address
Read/Write
R
1= Read
T
Slave Address
Master sends Read
request to Slave
Lack of ACK (low)
from Master
determines last
data byte to be read
Slave sends
Data to Master
Slave Transmitter
to
Master Receiver
Master Transmitter
to
Slave Receiver
Shading Denotes
42xxx
SDA Output Active
2025 ILL12.1
FIGURE 12. CURRENT ADDRESS BYTE READ MODE
2025 6.0 4/17/00
10