SMH4042
Sequential READ
Data Download
Sequential reads can be initiated as either a current The SMH4042 supports a proprietary mode of operation
address READ or random access READ. The first word is specifically for the Hot Swap environment. After a power
transmitted as with the other byte read modes (current on reset the internal address pointer is reset to 00. The
address byte READ or random address byte READ); host or ASIC then only needs to issue a read command
however, the master now responds with an and then sequentially clock out data starting at
ACKnowledge, indicating that it requires additional data address 00.
from the SMH4042. The SMH4042 continues to output
data for each ACKnowledge received. The master termi-
nates the sequential READ operation by not responding
with an ACKnowledge, and issues a STOP conditions.
During a sequential read operation, the internal address
counter is automatically incremented with each acknowl-
edge signal. For read operations, all address bits are
incremented, allowing the entire array to be read using a
single read command. After a count of the last memory
address, the address counter will ‘roll-over’ and the
memory will continue to output data.
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SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
