SMH4042
LOCAL_PCI_RST#: LOCAL_PCI_RST# is an open- asserted. On a CompactPCI board, this must be con-
drain active-low output. It is used to reset the backend nected to early power.
circuitry on the add-in card. It is active whenever the card-
side monitor inputs are below their respective VTRIP DEVICE OPERATION
levels. It may also be driven low by a low input on the
PCI_RST# pin.
Power-Up Sequence
The SMH4042 is an integrated power controller for any
hot swappable add-in card. The SMH4042 provides all
the signals and control functions to be compatible with
CompactPCI Hot Swap requirements for basic hot swap
systems, full hot swap boards and high availability sys-
tems.
LOCAL PCI_RST: LOCAL PCI_RST is an open-drain
(PFET) active-high output. It operates in parallel with
LOCAL_PCI_RST# providing an active high reset signal
which is required by many 8051 style MCUs. It is active
whenever the card-side monitor inputs are below their
respective VTRIP levels. It may also be driven active by a
low input on the PCI_RST# pin.
Insertion Process
Astheadd-inboardisinsertedintothebackplanephysical
connections should be made with the chassis in order to
properly discharge any voltage potentials to ground. The
board will first contact the long pins on the backplane that
provideearlypower(+5V,+3.3Vandground). Depending
CARD_3V_MON: The CARD_3V_MON input monitors
the card-side 3.3V supply. If the input falls below VTRIP
,
the HEALTHY# and SIGNL_VLD# outputs are de-as-
serted and the reset outputs are driven active.
VGATE3: VGATE3 is a slew rate limited high side driver upon the board configuration early power should be
output for the 3.3V external power FET gate. The routed to the VCC pin of the SMH4042. As soon as power
VGATE3 output-voltage is generated by an on-board is applied, the SMH4042 will assert the reset outputs to
charge pump.
the backend circuits, turn off the VGATE3/5 outputs
(disabling the external power FETS) and begin outputting
the 1-volt Vref. The 1-volt reference can be used to pre-
charge the I/O pins before they begin to mate with the bus
signals. The open collector HEALTHY# output will be de-
asserted, It should be actively pulled high by an external
pull-up resistor (minimum 10K ohm).
HST_3V_MON: The HST_3V_MON input monitors the
host 3.3 volt supply and it is used as a reference for the
circuit breaker comparator. If VCC3 falls below VTRIP
SGNL_VLD# is de-asserted, the high side drivers are
disabled and LOCAL_PCI_RST# is asserted.
,
CBI_3: CBI_3 is the circuit breaker input for the low
supply. With a series resistor placed in the supply path
between VCC3 and CBI_3, the circuit breaker will trip
whenever the voltage across the resistor exceeds 50mV.
The next pins to mate are the I/Os and the balance of the
power pins, if they are not already mated. The I/Os will
have been pre-charged by the Vref output of the
SMH4042.
CARD_5V_MON: The CARD_5V_MON input monitors
the card-side 5V supply. If the input falls below VTRIP, the
HEALTHY# and SIGNL_VLD# outputs are de-asserted
and the reset outputs are driven active.
The BD_SEL# pins are the last inputs to be driven to their
truestate. Inmostsystemsthesewillmostlikelybedriven
to ground when the short pins are mated. This would
indicate the card is fully inserted and the power-up se-
VGATE5: VGATE5 is a slew rate limited high side driver quence can begin. If, however, the design is based on
output for the 5V external power FET gate. The output high availability requirements the two pins can be actively
voltage is generated by an on-board charge pump.
driven by the host or combined with a switch input indicat-
ing the ejector handles are fully engaged.
VCC: VCC is the power supply pin for the SMH4042 This
input is monitored for power integrity. If it falls below the Sequencing
5V sense threshold (VTRIP) and the VSEL input is low, Once the proper card insertion has been assured, the
the SGNL_VLD# HEALTHY# signals are de-asserted, SMH4042willcheckthestatusofthePowerEnablesignal
the high side drivers disabled and reset outputs are from the host. This input can be used to power down
individual cards on the bus via software control; it must by
held high in order for the SMH4042 to enable power
sequencing to the card.
Once these conditions are met, the SMH4042 will drive
the VGATE3 and VGATE5 outputs to turn on the external
3 volt and 5 volt power FETs. The slew rate of these
outputs is controlled using on board circuitry and results
in a slew rate of 250V/s. Different slew rates can be
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SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
