SMH4803
SMH4803 Pin Descripiton
PIN NAME (Pin #)
Drain Sense (1)
The Drain Sense input monitors the voltage at the drain of
the external power MOSFET switch with respect to V
SS
.
When the MOSFET is turned on, the Drain Sense input
will be driven low and will be used as one of the enable
conditions for the PG outputs. This will prevent any
premature activation of the PG outputs.
Vgate (2)
The Vgate output activates an external power MOSFET
switch. It is a constant current source (100µA typical)
allowing easy programming of the MOSFET turn on slew
rate.
EN/TS (3)
The Enable/Temperature Sense input is the master en-
able input. When EN/TS is LOW, Vgate, and the PG
outputs are off. As the name suggests, the EN/TS input
may be used as a master enable by a host system or
alternatively for circuit over-temperature protection using
an external thermistor.
PD1# and PD2# (4 & 5)
The pin detect pins are active LOW inputs that are use to
prevent any power sequence before the add-in card is
properly seated. Both inputs must be at V
SS
before either
Vgate or the PG outputs can be enabled.
In applications where multi-length connector pins are use,
the PD inputs should be tied to the short pins. On the
mating connector side the pins opposite should be tied
directly to V
SS
. Alternatively, either one or both of the PD
inputs can be tied to card injector handle switches, insur-
ing no power sequencing will occur until the card is
properly seated.
CBFault# (6)
CBFault# is an open drain active low output, indicating the
circuit breaker status. When an over current condition is
detected CBFault# is driven low.
CBReset# (7)
CBReset# is the circuit breaker reset input. It can be
actively controlled to reset a fault condition or it can be tied
high or low to allow either timed restarts (duty cycle mode)
or “latch-off” the Vgate output. Refer to the Circuit Breaker
Operation and the associated timing diagrams for de-
tailed characteristics.
CBMode (8)
The CBMode input selects one of two circuit breaker
operational modes. When tied to V
SS
all fault conditions
must be cleared by toggling the CBReset# input low then
high.
2041 8.4 6/15/00
SUMMIT MICROELECTRONICS
When CBMode is tied to 5V the circuit breaker will be
placed in the self-restart or cycling mode. The state of
CBReset# input will control the operation of the restart. If
CBReset# is tied to 5V the Vgate output will automatically
restart after t
CYC
has elapsed. If the fault condition still
exists, the circuit breaker will trip once again. The cycling
will continue until the fault clears or the circuit board is
replaced. Alternatively the CBReset# input can be ac-
tively driven to V
SS
. If a fault occurs the Vgate and PG
outputs will not be turned on again for t
CYC
after the
CBReset# input is driven high.
CBSense (9)
The circuit breaker sense input is used to detect
overcurrent conditions in the load connected to the power
MOSFET. A low value sense resistor (RS) is tied in series
with the MOSFET switch; one end tied to V
SS
and the
other to the switch and the CBSense input. A voltage drop
of greater than 50mV (for greater than t
CBD
) across the
resistor will result in the circuit breaker tripping. A pro-
grammable “quick-trip” sense point is also available. If the
CBSense input transitions above the threshold, the circuit
breaker will immediately trip.
V
SS
(10)
V
SS
is connected to the negative side of the supply.
UV and OV (11 & 12)
The under-voltage (11) and over-voltage (12) input pins
monitor the supply voltage for the SMH4803 and the
downstream circuits. Both inputs have a 2.5V threshold
on their respective comparators. If UV is less than 2.5V or
if OV is greater than 2.5V, Vgate will be disabled.
5.0V (13)
5.0V is a precision 5 volt output reference voltage tha may
be use to expand the logic-input funtions on the
SMH4803. The reference output is with respect to V
SS
.
2.5V (14)
2.5V is a precision 2.5 volt output reference voltage tha
may be use to expand the logic-input funtions on the
SMH4803. The reference output is with respect to V
SS
.
ENPGB (15)
The ENPGB input may be used to independently switch
off the PG3# output. When ENPGB is pulled low, the
PG3# output is immediately placed in a high impedance
state. If PG2# is active and ENPGB is driven high, then
the PG3# output will immediately be driven low.
8
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