SMH4814 参数 Datasheet PDF下载

SMH4814

Preliminary Information

TIMING DIAGRAMS (CONTINUED)

Power-on Timing

Figure 7 illustrates some power on sequences, including the UV and OV differentials to their reference, and Power

Good cascading. Refer to the table on page 17 for more information on the t

PDD

and t

CBD

timings.

V

12

11V≤V

12

≤13V

<t

PUOVF

UV

<V

OV

>V

UV

OV

PD0

PD1

t

PDD

V

12

-V

GT

VGATE_HS

V

12

DRAIN

SENSE

5V

2.5V

REF

Programmable

level - V

CB

CBSENSE

<t

CBD

t

PGD0

PUP

X

t

PGD1

PUP

X

t

PGD2

PUP

X

t

PGD3

PUP

X

Figure 7 - SMH4814 Power-On Sequences

Summit Microelectronics, Inc

2080 2.0 07/21/05

12