SMS64
Preliminary
APPLICATIONS INFORMATION (CONTINUED)
If WLDI is held low the timers will free-run
generating a series of interrupts and resets. If WLDI is
held high the interrupt (Watchdog) output will be
disabled and only the reset (Longdog) outputs will be
active.
WATCHDOG AND LONGDOG TIMERS
The SMS64 contains two timers that can be
programmed independently. The Watchdog timer will
generate an interrupt if it times out. The Longdog timer
will generally be programmed to be of longer duration
than the Watchdog timer and will generate a reset if it
times out. Both timers are cleared by a low to high
transition on WLDI and start simultaneously.
Refer to Figure 6 which illustrates the action of
RST_A#, RST_B# and IRQ# with respect to the
Watchdog and Longdog timers and the WLDI input.
If the Longdog times out RST_A# and RST_B# will
be driven low either until a WLDI clear is received or
until tPRTO (whichever occurs first), at which time they
will return high. When RST_A# and RST_B# return
high both timers are reset to time zero. Therefore, if
the Longdog tPLDTO is shorter than the Watchdog
tPWDTO, RST_A# and RST_B# will effectively clear the
interrupt before it can drive the output low
t
t0
PWDTO t0
t0
t0
t0
t0
IRQ#
tPRTO
RST_A#
RST_B#
tPRTO
tPLDTO
tPLDTO
WLDI
Figure 6. Watchdog, Longdog and WLDI Timing Diagram
Summit Microelectronics, Inc
2060 2.22 10/09/03
14
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
