SMS8198
Acknowledge Polling
When the SMS8198 is performing an internal WRITE
operation, it will ignore any new START conditions. Since
the device will only return an acknowledge after it accepts
the START, the part can be continuously queried until an
acknowledge is issued, indicating that the internal WRITE
cycle is complete.
To poll the device, give it a START condition, followed by
a slave address for a WRITE operation (See Figure 7).
Internal WRITE Cycle
In Progress;
Begin ACK Polling
READ OPERATIONS
Read operations are initiated with the R/W bit of the
identification field set to “1.” There are four different read
options:
1.
2.
3.
4.
Current Address Byte Read
Random Address Byte Read
Current Address Sequential Read
Random Address Sequential Read
Issue Start
Issue Slave
Address and
R/W = 0
Issue Stop
Current Address Byte Read
The SMS8198 contains an internal address counter
which maintains the address of the last word accessed,
incremented by one. If the last address accessed (either
a read or write) was to address location n, the next read
operation would access data from address location n+1
and increment the current address pointer. When the
SMS8198 receives the slave address field with the R/W
bit set to “1,” it issues an acknowledge and transmits the
8-bit word stored at address location n+1.
The current address byte read operation only accesses a
single byte of data. The master does not acknowledge the
transfer, but does generate a stop condition. At this point,
the SMS8198 discontinues data transmission. See Fig-
ure 8 for the address acknowledge and data transfer
sequence.
ACK
Returned?
No
Yes (Internal WRITE Cycle is completed)
Next
operation a
WRITE?
Yes
Issue Byte
Address
Issue Stop
No
Proceed with
WRITE
Await Next
Command
2036 ILL9.0
Figure 7. Acknowledge Polling
SDA Bus Activity
1
A A A R
10 9 8 W
A
C
K
Data Byte
1 0 1 0
1
D D D D D D D D
7 6 5 4 3 2 1 0
1
S
T
O
P
S
T
Device
Type
A10,A9,A8
A
Address
Read/Write
R
1= Read
T
Slave Address
Master sends Read
request to Slave
Lack of ACK (low)
from Master
determines last
data byte to be read
Slave sends
Data to Master
Slave Transmitter
to
Master Receiver
Master Transmitter
to
Slave Receiver
Shading Denotes
SMS8198
SDA Output Active
2036 ILL10.0
Figure 8. Current Address Byte Read Mode
2036 5.0 4/18/00
8
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
