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HV66PJ 参数 Datasheet PDF下载

HV66PJ图片预览
型号: HV66PJ
PDF下载: 下载PDF文件 查看货源
内容描述: 具有独立的背板输出32通道LCD驱动器 [32-Channel LCD Driver with Separate Backplane Output]
分类和应用: 显示驱动器驱动程序和接口接口集成电路PC
文件页数/大小: 6 页 / 458 K
品牌: SUPERTEX [ Supertex, Inc ]
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HV66
Electrical Characteristics
(over recommended operating conditions unless noted)
DC Characteristics
(V
DD
= 5V, V
PP
= 32V, V
SS
= GND)
Symbol
I
DD
I
PPQ
I
DDQ
V
OH
V
OL
I
IH
I
IL
V
OLBP
V
OHBP
Parameter
V
DD
supply current
High voltage supply current
Min
Max
15
0.5
0.5
Quiescent V
DD
supply current
High-level output
Q
Data out
Low-level output
Q
Data out
High-level logic input current
Low-level logic input current
Low-level output voltage, backplane
High-level output voltage, backplane
29
22
4.6
2
0.4
1
-1
3
0.5
Units
mA
mA
mA
mA
V
V
V
V
µA
µA
V
V
Conditions
V
DD
= V
DD
max
f
CLK
= 5MHz
Outputs high
Outputs low
All V
IN
= V
SS
or V
DD
I
O
= 1mA, V
PP
= 24V
I
O
= -100µA
I
O
= 1mA
I
O
= 100µA
V
IH
= V
DD
V
IL
= 0V
I
O
= 10mA
I
O
= -10mA
AC Characteristics
(V
DD
= 5V, V
PP
= 32V, T
C
= 25°C), logic input rises/fall time = 10ns.
Symbol
f
CLK
t
W
t
SU
t
H
t
ON
, t
OFF
t
ON
, t
OFF
t
DHL
t
DLH
t
DLE
t
WLE
t
SLE
t
BR
, t
BF
t
BR
- t
BF
Parameter
Clock frequency
Clock width high or low
Data set-up time before clock rises
Data hold time after clock rises
Time from latch enable or POL to HV
OUT
Time from POL to BP output
Delay time clock to data high to low
Delay time clock to data low to high
Delay time clock to LE low to high
Width of LE pulse
LE set-up time before clock rises
BP
OUT
rise/fall time
BP
OUT
rise and fall difference
50
100
50
10
1000
100
100
25
50
500
500
200
200
Min
Max
5
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
C
L
= 350nF
C
L
= 350nF
C
L
= 20pF
C
L
= 20pF
C
L
= 10pF
C
L
= 10pF
Conditions
Recommended Operating Conditions
Symbol
V
DD
V
PP
V
IH
V
IL
f
CLK
T
A
I
OD
Logic supply voltage
Output voltage*
High-level input voltage
Low-level input voltage
Clock frequency
Operating free-air temperature
Allowable current through output diodes
Parameter
Min
4.5
0
2.4
0
0
-40
Max
5.5
32
V
DD
0.8
5
+85
200
Units
V
V
V
V
MHz
°C
mA
Notes:
*Output will not switch below 12V.
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
DD
.
Power-down sequence should be the reverse of the above.
The V
PP
should not drop below V
DD
during operation.
3.
4.
Set all inputs (Data, CLK, Enable, etc.) to a known state.
Apply V
PP
.
2