HV6810
10-Channel Serial-Input Latched Display Driver
Ordering Information
Package Options
Device
HV6810
18-Pin
Plastic DIP
HV6810P
20-Pin Small
Outline Package
HV6810WG
20-Pin Plastic
Chip Carrier
HV6810PJ
Die
HV6810X
*For Hi-Rel process flow, refer to page 5-3 of the Databook.
Features
s
High output voltage 80V
s
High speed 5MHz @ 5V
DD
s
Low power I
BB
≤
0.1mA (All high)
s
Active pull down 100µA min
s
Output source current 100mA at 60V V
PP
s
Each device drives 10 lines
s
High-speed serially-shifted data input
s
5V CMOS-compatible inputs
s
Latches on all driver outputs
s
Pin-compatible improved replacement for UCN5810A
and TL4810A, TL4810B
General Description
The HV6810 is a monolithic integrated circuit designed to drive a
dot matrix or segmented vacuum fluorescent display (VFD).
These devices feature a serial data output to cascade additional
devices for large displays.
A 10-bit data word is serially loaded into the shift register on the
positive-going transition of the clock. Parallel data is transferred
to the output buffers through a 10-bit D-type latch while the latch
enable input is high and is latched when the latch enable is low.
When the blanking input is high, all outputs are low.
Outputs are structures formed by double-diffused MOS (DMOS)
transistors with output voltage ratings of 80 volts and 25 milliam-
pere source-current capability. All inputs are compatible with
CMOS levels.
Absolute Maximum Ratings
1
Logic supply voltage, V
DD2
Driver supply voltage, V
BB2
Output voltage
2
Input voltage
2
Continuous total power dissipation
at 25°C free-air temperature
3
Operating Temperature Range
7.5V
90V
90V
-0.3V to V
DD
+ 0.3V
18-Pin P-DIP
3
900mW
4
1000mW
20-Pin SOIC
20-Pin PLCC
4
1000mW
-40° to +85*C
Notes:
1. Over operating free-air temperature.
2. All voltages are referenced to V
SS
.
3. For operation above 25°C ambient derate linearly to 85°C at 15mW/°C.
4. For operation above 25°C ambient derate linearly to 85°C at 16.7mW/°C.
12-142
SUPERTEX [ Supertex, Inc ]
