欢迎访问ic37.com |
会员登录 免费注册
发布采购

MD1213K6-G 参数 Datasheet PDF下载

MD1213K6-G图片预览
型号: MD1213K6-G
PDF下载: 下载PDF文件 查看货源
内容描述: 高速双MOSFET驱动器 [High Speed Dual MOSFET Driver]
分类和应用: 驱动器MOSFET驱动器驱动程序和接口接口集成电路PC
文件页数/大小: 7 页 / 704 K
品牌: SUPERTEX [ Supertex, Inc ]
 浏览型号MD1213K6-G的Datasheet PDF文件第2页浏览型号MD1213K6-G的Datasheet PDF文件第3页浏览型号MD1213K6-G的Datasheet PDF文件第4页浏览型号MD1213K6-G的Datasheet PDF文件第5页浏览型号MD1213K6-G的Datasheet PDF文件第6页浏览型号MD1213K6-G的Datasheet PDF文件第7页  
MD1213
High Speed Dual MOSFET Driver
Features
6ns rise and fall time with 1000pF load
2.0A peak output source/sink current
1.2V to 5V input CMOS compatible
4.5V to 13V total supply voltage
Smart logic threshold
Low jitter design
Two matched channels
Outputs can swing below ground
Low inductance package
Thermally-enhanced package
General Description
The Supertex MD1213 is a high speed, dual MOSFET driver. It is
designed to drive high voltage P and N-channel MOSFET transistors
for medical ultrasound and other applications requiring a high
output current for a capacitive load. The high-speed input stage of
the MD1213 can operate from 1.2V to 5.0V logic interface with an
optimum operating input signal range of 1.8V to 3.3V. An adaptive
threshold circuit is used to set the level translator switch threshold
to the average of the input logic 0 and logic 1 levels. The input logic
levels may be ground referenced, even though the driver is putting out
bipolar signals. The level translator uses a proprietary circuit, which
provides DC coupling together with high-speed operation.
The output stage of the MD1213 has separate power connections
enabling the output signal L and H levels to be chosen independently
from the supply voltages used for the majority of the circuit. As an
example, the input logic levels may be 0 and 1.8volts, the control logic
may be powered by +5.0V and –5.0V, and the output L and H levels
may be varied anywhere over the range of –5.0V to +5.0V. The output
stage is capable of peak currents of up to ±2.0A, depending on the
supply voltages used and load capacitance present.
The OE pin serves a dual purpose. First, its logic H level is used
to compute the threshold voltage level for the channel input level
translators. Secondly, when OE is low, the outputs are disabled, with
the A output high and the B output low. This assists in properly pre-
charging the AC coupling capacitors that may be used in series in the
gate drive circuit of an external PMOS and NMOS transistor pair.
Applications
Medical ultrasound imaging
Piezoelectric transducer drivers
Nondestructive evaluation
PIN diode driver
CCD Clock driver/buffer
High speed level translator
Typical Application Circuit
V
DD
1
OE
Level
Shifter
Level
Shifter
V
DD
2
V
H
+5V
0.47µF
IN
A
OUT
A
+100V
1µF
10nF
3.3V CMOS
Logic Inputs
V
SS
2
V
L
V
H
V
DD
2
10nF
IN
B
Level
Shifter
-100V
To Piezoelectric
Transducer
OUT
B
Supertex
TC6320
1µF
MD1213
Gnd
V
SS
1
V
SS
2
V
L
-5V
0.47µF