TP2510
Low Threshold
P-Channel Enhancement Mode
Vertical DMOS FETs
Features
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Low threshold — -2.4V max.
High input impedance
Low input capacitance — 125pF max.
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Complementary N and P-channel devices
General Description
These low threshold enhancement-mode (normally-off) tran-
sistors utilize a vertical DMOS structure and Supertex’s well-
proven silicon-gate manufacturing process. This combination
produces devices with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coefficient inherent in MOS devices. Characteristic
of all MOS structures, these devices are free from thermal
runaway and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
widerange of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Applications
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Logic level interfaces — ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
Switching Waveforms and Test Circuit
0V
10%
INPUT
-10V
PULSE
GENERATOR
90%
t
(OFF)
t
r
t
d(OFF)
t
F
INPUT
R
GEN
D.U.T.
Output
R
L
10%
t
(ON)
t
d(ON)
0V
90%
OUTPUT
V
DD
90%
10%
V
DD
Thermal Characteristics
Package
TO-243AA
I
D
continuous
†
(mA)
I
D
pulsed
(A)
Power Dissipation
@ T
A
= 25
O
C
(W)
O
θ
jc
( C/W)
O
θ
jc
( C/W)
I
DR
†
(mA)
I
DRM
(A)
-480
-2.5
1.6
‡
15
78
‡
-480
-2.5
† I
D
(continuous) is limited by max rated T
j
.
‡ Mounted on FR5 board, 25mm x 25mm x 1.57mm.
SUPERTEX [ Supertex, Inc ]
