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SM5953W40PP 参数 Datasheet PDF下载

SM5953W40PP图片预览
型号: SM5953W40PP
PDF下载: 下载PDF文件 查看货源
内容描述: SM5953\n8位微控制器\n15KB具有ISP功能的Flash\n和256B RAM的嵌入式 [SM5953 8-Bit Micro-controller 15KB with ISP Flash & 256B RAM embedded]
分类和应用: 微控制器
文件页数/大小: 43 页 / 1575 K
品牌: SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
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SM5953
8-Bit Micro-controller
15KB with ISP Flash
& 256B RAM embedded
4.3
Program Status Word
Mnemonic: PSW
7
6
CY
AC
CY: Carry flag.
AC: Auxiliary Carry flag for BCD operations.
F0: General purpose Flag 0 available for user.
RS[1:0]: Register bank select, used to select working register bank.
RS[1:0]
Bank Selected
Location
00
Bank 0
00h – 07h
01
Bank 1
08h – 0Fh
10
Bank 2
10h – 17h
11
Bank 3
18h – 1Fh
OV: Overflow flag.
F1: General purpose Flag 1 available for user.
P: Parity flag, affected by hardware to indicate odd/even number of “one” bits in the
Accumulator, i.e. even parity.
4.4
Stack Pointer
5
F0
4
3
2
OV
1
F1
Address: D0h
0
Reset
P
00h
RS [1:0]
The stack pointer is a 1-byte register initialized to 07h after reset. This register is incremented before PUSH and
CALL instructions, causing the stack to start from location 08h.
Mnemonic: SP
7
6
5
4
3
2
1
Address: 81h
0
Reset
07h
SP [7:0]
SP[7:0]: The Stack Pointer stores the scratchpad RAM address where the stack begins. In other
words, it always points to the top of the stack.
4.5
Data Pointer
The data pointer (DPTR) is 2-bytes wide. The lower part is DPL, and the highest is DPH. It can be loaded as a 2-
byte register (e.g. MOV DPTR, #data16) or as two separate registers (e.g. MOV DPL,#data8). It is generally used
to access the external code or data space (e.g. MOVC A,@A+DPTR or MOVX A,@DPTR respectively).
Mnemonic: DPL
7
6
5
4
3
DPL [7:0]
2
1
Address: 82h
0
Reset
00h
DPL[7:0]: Data pointer Low
Mnemonic: DPH
7
6
5
4
3
DPH [7:0]
2
1
Address: 83h
0
Reset
00h
DPH [7:0]: Data pointer High
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M074
Ver B
SM5953
12/27/2013
- 18 -