MQFL-28V-1R8S
Output:
1.8V
Current:
40A
technical Specification
Inside the converter, +SENSE is connected to +Vout with a resistor
value from 100W to 301W, depending on output voltage, and
–SENSE is connected to OUTPUT RETURN with a 10W resistor.
It is also important to note that when remote sense is used,
the voltage across the converter’s output terminals (pins 7 and
8) will be higher than the converter’s nominal output voltage
due to resistive drops along the connecting wires. This higher
voltage at the terminals produces a greater voltage stress on the
converter’s internal components and may cause the converter to
fail to deliver the desired output voltage at the low end of the
input voltage range at the higher end of the load current and
temperature range. Please consult the factory for details.
SYNCHRONIZATION:
The MQFL converter’s regulation and
isolation stage switching frequencies can be synchronized to an
external frequency source that is in the 500 kHz to 600 kHz range.
The boost-converter stage is free-running at about 670 kHz while
it is operational, and is not affected by synchronization signals. A
pulse train at the desired frequency should be applied to the SYNC
IN pin (pin 6) with respect to the INPUT RETURN (pin 2). This pulse
train should have a duty cycle in the 20% to 80% range. Its low
value should be below 0.8V to be guaranteed to be interpreted
as a logic low, and its high value should be above 2.0V to be
guaranteed to be interpreted as a logic high. The transition time
between the two states should be less than 300ns.
PIN 6
PIN 2
5V
5K
TO SYNC
CIRCUITRY
ad
pu
va
bl
ic n
at ce
io d
n
SYNC IN
IN RTN
5K
Figure B:
Equivalent circuit looking into the SYNC IN pin with
respect to the IN RTN (input return) pin.
5V
5K
FROM SYNC
CIRCUITRY
SYNC OUT
PIN 5
PIN 2
IN RTN
OPEN COLLECTOR
OUTPUT
If the MQFL converter is not to be synchronized, the SYNC IN pin
should be left open circuit. The converter will then operate in its
free-running mode at a frequency of approximately 550 kHz.
If, due to a fault, the SYNC IN pin is held in either a logic low
or logic high state continuously, the MQFL converter will revert
to its free-running frequency.
Figure C:
Equivalent circuit looking into SYNC OUT pin with
respect to the IN RTN (input return) pin.
The MQFL converter also has a SYNC OUT pin (pin 5). This
output can be used to drive the SYNC IN pins of as many as
ten (10) other MQFL converters. The pulse train coming out
of SYNC OUT has a duty cycle of 50% and a frequency that
1
matches the switching frequency of the converter with which it
+VIN
is associated. This frequency is either the free-running frequency
2
if there is no synchronization signal at the SYNC IN pin, or the
IN RTN
synchronization frequency if there is.
3
The SYNC OUT signal is available only when the voltage at the
4
28Vdc +
STABILITY pin (pin 3) is above approximately 12V and when
ENA 1
–
the converter is not inhibited through the ENA1 pin. An inhibit
5
through the ENA2 pin will not turn the SYNC OUT
SYNC OUT
signal off.
SYNC IN
NOTE: An MQFL
has its SYNC IN pin driven by
the SYNC OUT pin of a second MQFL converter will have its
start of its switching cycle delayed approximately 180 degrees
relative to that of the second converter.
open
means
converter
on
that
CURRENT SHARE:
When several MQFL converters are placed
in parallel to achieve either a higher total load power or N+1
redundancy, their SHARE pins (pin 11) should be connected
together. The voltage on this common SHARE node represents the
average current delivered by all of the paralleled converters. Each
converter monitors this average value and adjusts itself so that its
output current closely matches that of the average.
Since the SHARE pin is monitored with respect to the OUTPUT
RETURN (pin 8) by each converter, it is important to connect all of
the converters’ OUTPUT RETURN pins together through a low DC
12
and AC impedance. When this is done correctly, the converters
ENA 2
will deliver their appropriate fraction of the total load current to
within +/- 10% at full rated
11
load.
SHARE
CASE
6
Whether or not converters
10
are paralleled, the voltage at the
+ SNS
SHARE pin could be used to monitor the approximate average
Rtrim
9
current delivered by
SNS
converter(s). A nominal voltage of 1.0V
–
the
represents zero current and
8
nominal voltage of 2.2V represents
a
–
the maximum rated current, with a linear relationship in between.
OUT RTN
Load
The internal source resistance of a converter’s SHARE pin signal is
7
2.5 kW. During an
+VOUT
input voltage fault or primary disable event, the
+
SHARE pin outputs a power failure warning pulse. The SHARE pin
will go to 3V for approximately 14ms as the output voltage falls.
NOTE: Converters operating from separate input filters with
reverse polarity protection (such as the MQME-28-T filter) with
their outputs connected in parallel may exhibit hiccup operation
at light loads. Consult factory for details.
Doc.# 005-005-0005186 Rev. 1 04/21/09
Figure B shows the equivalent circuit looking into the SYNC
IN pin. Figure C shows the equivalent circuit looking into the
SYNC OUT pin.
Phone 1-888-567-9596
Product # MQFL-28V-1R8S
www.synqor.com
Page 12
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