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CC2510F16RSP 参数 Datasheet PDF下载

CC2510F16RSP图片预览
型号: CC2510F16RSP
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller]
分类和应用: 存储电信集成电路射频控制器
文件页数/大小: 244 页 / 2899 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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C2510Fx / CC2511Fx
7
7.1
Electrical Specifications
Current Consumption
T
A
= 25
°C,
VDD = 3.0 V if nothing else stated. All measurement results are obtained using the
CC2510EM reference design ([1]).
Parameter
Active mode, full
speed (high speed
1
crystal oscillator) .
Low CPU activity.
Min
Typ
4.8
4.6
Max
Unit
mA
mA
Condition
System clock running at 26 MHz.
System clock running at 24 MHz.
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. No peripherals running.
Low CPU activity: No flash access (i.e. only cache hit), no RAM
access
Active mode, full
speed (HS
1
RCOSC) .
Low CPU activity.
Active mode with
radio in RX
19.8
17.1
19.8
21.5
18.8
19.0
22.9
20.5
19.6
19.7
17.5
16.7
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
2.5
mA
System clock running at 26 MHz.
Digital regulator on. HS RCOSC and low power RCOSC running.
System clock running at 13 MHz. No peripherals running.
Low CPU activity: No flash access (i.e. only cache hit), no RAM
access
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. Radio in RX mode (sensitivity optimized
2.4 kBaud, input at sensitivity limit, system clock running at 26 MHz.
2.4 kBaud, input at sensitivity limit, system clock running at 203 kHz.
2.4 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
10 kBaud, input at sensitivity limit, system clock running at 26 MHz.
10 kBaud, input at sensitivity limit, system clock running at 203 kHz.
10 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
250 kBaud, input at sensitivity limit, system clock running at 26 MHz.
250 kBaud, input at sensitivity limit, system clock running at 1.625
MHz.
250 kBaud, input well above sensitivity limit, system clock running at
26 MHz. See Figure 2 for typical variation over operating conditions
500 kBaud, input at sensitivity limit, system clock running at 26 MHz.
500 kBaud, input at sensitivity limit, system clock running at 3.25
MHz.
500 kBaud, input well above sensitivity limit
Digital regulator on. High speed crystal oscillator and low power
RCOSC running. Radio in RX mode (current optimized
17.4
14.7
17.4
19.4
15.7
16.9
mA
mA
mA
mA
mA
mA
2.4 kBaud, input at sensitivity limit, system clock running at 26 MHz.
2.4 kBaud, input at sensitivity limit, system clock running at 203 kHz.
2.4 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
10 kBaud, input at sensitivity limit, system clock running at 26 MHz.
10 kBaud, input at sensitivity limit, system clock running at 203 kHz.
10 kBaud, input well above sensitivity limit, system clock running at
26 MHz.
Note: In order to reduce the current consumption in active mode, the clock speed can be reduced by
setting
CLKCON.CLKSPD
000 (see section 13.1 for details). Figure 1 shows typical current
consumption in active mode for different clock speeds
SWRS055D
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