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CD74HCT670MTG4 参数 Datasheet PDF下载

CD74HCT670MTG4图片预览
型号: CD74HCT670MTG4
PDF下载: 下载PDF文件 查看货源
内容描述: 高速CMOS逻辑4×4寄存器文件 [High-Speed CMOS Logic 4x4 Register File]
分类和应用: 内存集成电路静态存储器光电二极管
文件页数/大小: 17 页 / 568 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CD54HC670, CD74HC670,
CD74HCT670
Data sheet acquired from Harris Semiconductor
SCHS195C
January 1998 - Revised October 2003
High-Speed CMOS Logic
4x4 Register File
Description
The ’HC670 and CD74HCT670 are 16-bit register files
organized as 4 words x 4 bits each. Read and write address
and enable inputs allow simultaneous writing into one location
while reading another. Four data inputs are provided to store
the 4-bit word. The write address inputs (WA0 and WA1)
determine the location of the stored word in the register.
When write enable (WE) is low the word is entered into the
address location and it remains transparent to the data. The
outputs will reflect the true form of the input data. When (WE)
is high data and address inputs are inhibited. Data acquisition
from the four registers is made possible by the read address
inputs (RA1 and RA0). The addressed word appears at the
output when the read enable (RE) is low. The output is in the
high impedance state when the (RE) is high. Outputs can be
tied together to increase the word capacity to 512 x 4 bits.
Features
[ /Title
(CD74H
C670,
CD74H
CT670)
/Subject
(High-
Speed
CMOS
Logic
4x4 Reg-
ister
• Simultaneous and Independent Read and Write
Operations
• Expandable to 512 Words of n-Bits
• Three-State Outputs
• Organized as 4 Words x 4 Bits Wide
• Buffered Inputs
• Typical Read Time = 16ns for ’HC670 V
CC
= 5V, C
L
=
15pF, T
A
= 25
o
C
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
1µA at V
OL
, V
OH
Ordering Information
PART NUMBER
CD54HC670F3A
CD74HC670E
CD74HC670M
CD74HC670MT
CD74HC670M96
CD74HCT670E
CD74HCT670M
CD74HCT670MT
CD74HCT670M96
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
Pinout
CD54HC670
(CERDIP)
CD74HC670, CD74HCT670
(PDIP, SOIC)
TOP VIEW
D1 1
D2 2
D3 3
RA1 4
RA0 5
Q3 6
Q2 7
GND 8
16 V
CC
15 D0
14 WA0
13 WA1
12 WE
11 RE
10 Q0
9 Q1
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
2003, Texas Instruments Incorporated
1