SNLS420B – JULY 2012 – REVISED APRIL 2013
24
23
22
21
20
19
18
16
15
14
12
11
10
6
7
RES
8
MODE
ID[x]
VDDIO
DIN[6]
25
GPO[2]/
CLKOUT
17
GPO[3]/
CLKIN
DIN[4]
DIN[3]
DIN[5]
DIN[2]
DIN[1]
DIN[0]
DAP = GND
GPO[1]
26
GPO[0]
DIN[7]
27
VDDCML
VDDD
29
DIN[8]
DIN[9]
DS90UB913Q
32-Pin WQFN
(Top View)
28
13
DOUT+
DOUT-
30
VDDT
VDDPLL
DIN[10]
DIN[11]
31
32
PDB
1
2
3
4
5
PCLK
HSYNC
VSYNC
SCL
Serializer - DS90UB913Q — Top View
DS90UB913Q SERIALIZER PIN DESCRIPTIONS
Pin Name
DIN[0:11]
Pin No.
19,20,21,22,
23,24,26,27,
29,30,31,32
1
I/O, Type
Inputs,
LVCMOS
w/ pull down
Inputs,
LVCMOS
w/ pull down
Inputs,
LVCMOS
w/ pull down
Parallel Data Inputs.
Description
LVCMOS PARALLEL INTERFACE
HSYNC
Horizontal SYNC Input
VSYNC
2
Vertical SYNC Input
PCLK
3
Input, LVCMOS Pixel Clock Input Pin. Strobe edge set by TRFB control register.
w/ pull down
Output,
LVCMOS
General-purpose output pins can be configured as outputs; used to control and
respond to various commands. GPO[0:1] can be configured to be the outputs for input
signals coming from GPIO[0:1] pins on the Deserializer or can be configured to be
outputs of the local register on the Serializer.
GPO2 pin can be configured to be the output for input signal coming from the GPIO2
pin on the Deserializer or can be configured to be the output of the local register on
the Serializer. It can also be configured to be the output clock pin when the
DS90UB913Q device is used in the External Oscillator mode. See
for a detailed description of the DS90UB913/914Q chipsets working with
the external oscillator.
GENERAL PURPOSE OUTPUT (GPO)
GPO[1:0]
16,15
GPO[2]/CLKOUT
17
Output,
LVCMOS
SDA
9
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3
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