TCS3404, TCS3414
DIGITAL COLOR SENSORS
TAOS137A − APRIL 2011
Electrical Characteristics, T
A
= 255C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Power on (ADC inactive)
I
DD
V
OL
I
LEAK
Supply current @ V
DD
= 3.6 V
INT, SDA output low voltage
Input leakage current (SDA, SCL, SYNC)
Power on (ADC active)
Power down
3 mA sink current
V
IH
= V
DD,
V
IL
= GND
0
−5
MIN
TYP
7.7
8.7
700
MAX
10
11
1000
0.4
5
UNIT
mA
mA
μA
V
μA
AC Electrical Characteristics, V
DD
= 3.3 V, T
A
= 255C (unless otherwise noted)
PARAMETER
†
Clock frequency 400 kHz (I
2
C)
f
(SCL)
t
(BUF)
t
(HDSTA)
t
(SUSTA)
t
(SUSTO)
t
(HDDAT)
t
(SUDAT)
t
(LOW)
t
(HIGH)
t
(TIMEOUT)
t
F
t
R
C
i
t
LOW (SYNC)
t
HIGH (SYNC)
t
F (SYNC)
t
R (SYNC)
†
TEST CONDITIONS
MIN
0
10
1.3
0.6
0.6
0.6
0
100
1.3
0.6
25
TYP
MAX
400
100
UNIT
kHz
kHz
μs
μs
μs
μs
μs
ns
μs
μs
Clock frequency 100 kHz (SMBus)
Bus free time between start and stop condition
Hold time after (repeated) start condition. After
this period, the first clock is generated.
Repeated start condition setup time
Stop condition setup time
Data hold time
Data setup time
SCL clock low period
SCL clock high period
Detect clock/data low timeout (SMBus only)
Clock/data fall time
Clock/data rise time
Input pin capacitance
SYNC low period (see Figure 1)
SYNC high period (see Figure 1)
SYNC fall time (see Figure 1)
SYNC rise time (see Figure 1)
0.9
35
300
300
10
50
50
50
50
ms
ns
ns
pF
μs
μs
ns
ns
Specified by design and characterization; not production tested.
t
LOW (SYNC)
t
R (SYNC)
t
F (SYNC)
t
HIGH (SYNC)
Figure 1. Timing Diagram for Sync
Copyright
E
2011, TAOS Inc.
r
r
The
LUMENOLOGY
r
Company
4
www.taosinc.com