欢迎访问ic37.com |
会员登录 免费注册
发布采购

TSL1406RS 参数 Datasheet PDF下载

TSL1406RS图片预览
型号: TSL1406RS
PDF下载: 下载PDF文件 查看货源
内容描述: 768 】 1线性传感器阵列HOLD [768 】 1 LINEAR SENSOR ARRAY WITH HOLD]
分类和应用: 传感器
文件页数/大小: 14 页 / 228 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
 浏览型号TSL1406RS的Datasheet PDF文件第2页浏览型号TSL1406RS的Datasheet PDF文件第3页浏览型号TSL1406RS的Datasheet PDF文件第4页浏览型号TSL1406RS的Datasheet PDF文件第5页浏览型号TSL1406RS的Datasheet PDF文件第6页浏览型号TSL1406RS的Datasheet PDF文件第7页浏览型号TSL1406RS的Datasheet PDF文件第8页浏览型号TSL1406RS的Datasheet PDF文件第9页  
r
r
TSL1406R, TSL1406RS
768
×
1 LINEAR SENSOR ARRAY WITH HOLD
TAOS042D
APRIL 2007
D
D
D
D
D
D
D
D
D
D
D
768
×
1 Sensor-Element Organization
400 Dot-Per-Inch (DPI) Sensor Pitch
High Linearity and Uniformity
Wide Dynamic Range . . . 4000:1 (72 dB)
Output Referenced to Ground
Low Image Lag . . . 0.5% Typ
Operation to 8 MHz
Single 3-V to 5-V Supply
Rail-to-Rail Output Swing (AO)
No External Load Resistor Required
Replacement for TSL1406
TSL1406R
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
Description
The TSL1406R is a 400 dots-per-inch (DPI) linear
sensor array consisting of two 384-pixel sections,
each with its own output. The sections are aligned
to form a contiguous 768
×
1 pixel array. The
device incorporates a pixel data-hold function that
provides simultaneous integration-start and
integration-stop times for all pixels.
V
PP
SI1
HOLD1
CLK1
GND
AO1
SO1
SI2
HOLD2
CLK2
SO2
AO2
V
DD
Pixels measure 63.5
μm
by 55.5
μm,
with 63.5-μm center-to-center spacing and 8-μm spacing between pixels.
Operation is simplified by internal logic that requires only a serial-input (SI) pulse and a clock.
The device operates from a single 5-V power source. The two sections of 384 pixels each can be read out
separately or can be cascaded to provide a single output for all 768 pixels (see Figure 9).
The TSL1406RS is the same device mounted in a shorter package. These devices are intended for use in a
wide variety of applications including mark and code reading, OCR and contact imaging, edge detection and
positioning, and optical encoding.
Functional Block Diagram (each section)
Pixel 1
(385)
1 Integrator
Reset
2
2
Pixel
2
(386)
Pixel
3
(387)
Pixel
384
(768)
Analog
Bus
13
V
DD
S1
_
+
1
3
S2
Sample/Hold/
Output
Output
Buffer
6, 12
AO
5
GND
Switch Control Logic
Hold
3, 9
Hold
Q1
Q2
Q3
Q384 (Q768)
Gain
Trim
7, 11
SO
CLK
SI
4, 10
2, 8
384-Bit Shift Register (2 each)
The
LUMENOLOGY
r
Company
Texas Advanced Optoelectronic Solutions Inc.
1001 Klein Road
S
Suite 300
S
Plano, TX 75074
S
(972) 673-0759
r
www.taosinc.com
1
r
Copyright
E
2007, TAOS Inc.