VOLTAGEDETECTOR
1
2
3
4
5
6
7
8
TC54
TIMING CHART
DESCRIPTION OF OPERATION
Refer to the Timing Chart below. In normal steady-state
operation, when VIN > VD–ET, the output will be at a logic high.
In the case of the TC54V, this is an open-drain condition. If
+
V
IN
V
DET
RELEASE
VOLTAGE
RESET
VOLTAGE
OR
–
,theoutputwillpulldown
andwhentheinputfallsbelowVDET
V
HYST
–
DETECT VOLTAGE
V
DET
(Logic 0) to VSS. Generally, VOUT can pull down to within
0.5V of VSS at rated output current and input voltage. (See
the Electrical Characteristics section).
The output, VOUT, will stay valid until the input voltage
falls below the Minimum Operating Voltage, VIN(MIN), of
1.5V. Below this minimum operating voltage, the output is
undefined. During power-up or anytime VIN has fallen below
VIN (MIN), VOUT will remain undefined until VIN rises above
MINIMUM OPERATING
VOLTAGE
GROUND LEVEL
OUTPUT VOLTAGE
GROUND LEVEL
VIN(MIN), at which time the output will become valid. VOUT
+
will be in its active low state while VIN(MIN) < VIN
<
.
VDET
+
–
(
=
+ VHYST). If and when the input rises above
, the output will assume its inactive state. (High for
VDET VDET
+
VDET
TC54VC, open-drain for TC54VN).
APPLICATIONS
Refer to TelCom Semiconductor Application Note #2,
Using the TC54 Voltage Detector.
MARKING
SOT-23A-3
TO-92
SOT-89-3
1
5
2
6
3
7
4
8
9 10 11 12
ቢ = output (Nch or CMOS) plus first voltage digit
ቢ, ባ & ቤ = 54_ (fixed)
2 3 4 5 6
ብ = output (C = CMOS, N = Nch)
ቦ = first voltage digit (2-6)
Nch
CMOS
M N P R S
C D E F H
D
ex: CMOS 3.x = kkkk
ባ = first voltage decimal (0-9)
ex: CMOS 3.4 = kkkk
ቤ & ብ = assembly lot number
ቧ = first voltage decimal (0-9)
ቨ = extra feature code : fixed : 0
D
4
ቩ = detecting accuracy
1 = ± 1.0% (custom), 2 = ± 2.0% (standard)
ቪ, ቫ, ቭ & ቮ = assembly lot number
TELCOM SEMICONDUCTOR, INC.
4-281