4-1/2 DIGIT ANALOG-TO-DIGITAL
CONVERTER WITH ON-CHIP LCD DRIVERS
1
2
3
4
5
6
7
8
TC7129
DEINTEGRATE
INTEGRATE
OVERSHOOT DUE TO ZERO CROSSING
BETWEEN CLOCK PULSES
TIME
INTEGRATOR RESIDUE VOLTAGE
OVERSHOOT CAUSED BY
COMPARATOR DELAY OF
1 CLOCK PULSE
CLOCK PULSES
Figure 10. Accuracy Errors in Dual-Slope Conversion
ZERO
INTEGRATE
AND LATCH
INT
1
INTEGRATE
DE
1
DEINTEGRATE
REST X10
DE
REST X10
DE
ZERO INTEGRATE
2
3
TC7129
NOTE: Shaded area greatly expanded
in time and amplitude.
INTEGRATOR
Figure 11. Integrator Waveform
RESIDUAL VOLTAGE
Digital Auto-Zeroing
Inside the TC7129
To eliminate the effect of amplifier offset errors, the
TC7129 uses a digital auto-zeroing technique. After the
input voltage is measured as described above, the mea-
surement is repeated with the inputs shorted internally. The
reading with inputs shorted is a measurement of the internal
errors and is subtracted from the previous reading to obtain
a corrected measurement. Digital auto-zeroing eliminates
theneedforanexternalauto-zeroingcapacitorusedinother
ADCs.
Figure 12 shows a simplified block diagram of the
TC7129.
Integrator Section
Theintegratorsectionincludestheintegrator, compara-
tor, input buffer amplifier, and analog switches used to
change the circuit configuration during the separate mea-
surement phases described earlier.
TELCOM SEMICONDUCTOR, INC.
3-241