DG200A
Test Circuits
V
O
is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
+15 V
Logic
Input
Switch
Input
Switch
Output
3V
50%
0V
t
OFF
V
S
90%
V
O
t
ON
3V
GND
t
r
<20 ns
t
f
<20 ns
V
S
= +5 V
S
IN
V+
D
V
O
R
L
1 kW
C
L
35 pF
V–
–15 V
V
O
= V
S
R
L
R
L
+ r
DS(on)
Figure 2.
Switching Time
+15 V
DV
O
R
g
V+
S
IN
3V
GND
V–
DV
O
= measured voltage error due to charge injection
The charge injection in coulombs is
DQ
= C
L
x
DV
O
–15 V
D
V
O
C
L
1000 pF
IN
X
ON
OFF
ON
V
O
V
g
Figure 3.
Charge Injection
C
+15 V
C
V+
+15 V
V+
V
S
S
D
V
O
R
L
GND
V–
C
R
g
= 50
W
0V
S
1
IN
1
S
2
IN
2
GND
–15 V
–15 V
Off Isolation = 20 log
V
S
V
O
X
TALK
= 20 log
C = RF bypass
V
S
V
O
V–
C
D
2
D
1
50
W
V
O
R
L
V
S
R
g
= 50
W
5V
IN
NC
0V
Figure 4.
Off Isolation
Figure 5.
Channel-to-Channel Crosstalk
Siliconix
S-52880—Rev. B, 28-Apr-97
5
TEMIC [ TEMIC SEMICONDUCTORS ]
