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E5530H-232-S8 参数 Datasheet PDF下载

E5530H-232-S8图片预览
型号: E5530H-232-S8
PDF下载: 下载PDF文件 查看货源
内容描述: 128位IDIC射频识别 [128-Bit IDIC for Radio Frequency Identification]
分类和应用: 射频
文件页数/大小: 5 页 / 75 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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e5530
128-Bit IDIC
®
for Radio Frequency Identification
Description
The e5530 is part of a closed coupled identification
system. It receives power from an RF transmitter which
is coupled inductively to the IDIC
®
. The frequency is
typically 100 to 450 kHz. Receiving RF, the IDIC
®
responds with a data stream by damping the incoming RF
via an internal load. This damping-in-turn can be detected
by the interrogator. The identifying data are stored in a
128 bit PROM on the e5530, realized as an array of laser-
programmable fuses. The logic block diagram for the
e5530 is shown in figure 2. The data are output bit-
serially as a code of length 128, 96, 64 or 32 bits. The
chips are factory-programmed with a unique code.
Bitrate [bit/s]:
RF/8,RF/16, RF/32, RF/40,
RF/50, RF/64, RF/80, RF/100,
RF/128, RF/256
FSK, PSK, BIPH, Manchester
BIPH-FSK
Features
D
Low power, low voltage CMOS
D
Rectifier, voltage limiter, clock extraction
on-chip (no battery)
Modulation:
D
Small size
D
Factory laser programmable ROM
D
Operating temperature range –40 to +125°C
D
Radio Frequency
(RF): 100 to 450 kHz
D
Transmission options
Code length: 128, 96, 64, 32 bits
Application
RF transmitter
and
interrogator
IDIC
®
e5530
95 10318
RF
Figure 1. Application
Analog front end
Mod
Modulator
FSK
PSK
BIPH
Manchester
Row decoder
Data
95 10155
Load
Coil
Clock
extractor
Clk
R7
R6
R5
R4
R3
R2
R1
R0
128 bit PROM
Coil
A2
A1
A0
A6
A5
A4
A3
Rectifier
Bitrate
V
DD
V
SS
Figure 2. Block diagram
IDIC
®
stands for
IDentification Integrated Circuit
and is a trademark of TEMIC.
Rev. A3, 17-Sep-98
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
C0
Column decoder
Counter
1 (5)