DG300A/301A/302A/303A
Functional Block Diagram and Pin Configuration (Cont’d)
DG301A
Dual-In-Line
NC
D
1
NC
S
1
NC
IN
GND
1
2
3
4
5
6
7
Top View
14
13
V+
D
2
S
1
2
3
4
NC
5
GND
Top View
6
V–
8
7
D
1
1
10
9
S
2
D
2
DG301A
Metal Can
V+ (Substrate and Case)
Truth Table
Logic
0
1
12 NC
11
10
9
8
S
2
NC
NC
V–
SW
1
OFF
ON
SW
2
ON
OFF
IN
NC
Logic “0”
v
0.8 V
Logic “1”
w
4 V
1
DG302A
Dual-In-Line
NC
S
3
D
3
D
1
S
1
IN
1
GND
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
V+
S
4
D
4
D
2
S
2
IN
2
V–
Truth Table
Logic
0
1
Switch
OFF
ON
Logic “0”
v
0.8 V
Logic “1”
w
4 V
DG303A
Dual-In-Line
1
2
3
4
5
6
7
Top View
14
13
12
11
10
9
8
NC
S
3
D
3
D
1
S
1
IN
1
GND
V+
S
4
D
4
D
2
S
2
IN
2
V–
Truth Table
Logic
0
1
SW
1
, SW
2
OFF
ON
Logic “0”
v
0.8 V
Logic “1”
w
4 V
SW
3
, SW
4
ON
OFF
2
Siliconix
S-52880—Rev. C, 28-Apr-97
TEMIC [ TEMIC SEMICONDUCTORS ]
