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TS80C31X2-LCBB 参数 Datasheet PDF下载

TS80C31X2-LCBB图片预览
型号: TS80C31X2-LCBB
PDF下载: 下载PDF文件 查看货源
内容描述: 8位CMOS微控制器0-60兆赫 [8-bit CMOS Microcontroller 0-60 MHz]
分类和应用: 微控制器和处理器外围集成电路异步传输模式ATM时钟
文件页数/大小: 40 页 / 452 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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TS80C31X2
8-bit CMOS Microcontroller 0-60 MHz
1. Description
TEMIC TS80C31X2 is high performance CMOS and
ROMless versions of the 80C51 CMOS single chip 8-
bit microcontroller.
The TS80C31X2 retains all features of the TEMIC
TSC80C31 with 128 bytes of internal RAM, a 5-source,
4 priority level interrupt system, an on-chip oscilator
and two timer/counters.
In addition, the TS80C31X2 has a dual data pointer, a
more versatile serial channel that facilitates
multiprocessor communication (EUART) and a X2 speed
improvement mechanism.
The fully static design of the TS80C31X2 allows to
reduce system power consumption by bringing the clock
frequency down to any value, even DC, without loss of
data.
The TS80C31X2 has 2 software-selectable modes of
reduced activity for further reduction in power
consumption. In the idle mode the CPU is frozen while
the timers, the serial port and the interrupt system are still
operating. In the power-down mode the RAM is saved
and all other functions are inoperative.
2. Features
q
80C31 Compatible
8031 pin and instruction compatible
Four 8-bit I/O ports
Two 16-bit timer/counters
128 bytes scratchpad RAM
q
Interrupt Structure with
5 Interrupt sources,
4 priority level interrupt system
q
Full duplex Enhanced UART
Framing error detection
Automatic address recognition
q
High-Speed Architecture
40 MHz @ 5V, 30MHz @ 3V
X2 Speed Improvement capability (6 clocks/
machine cycle)
30 MHz @ 5V, 20 MHz @ 3V (Equivalent to
60 MHz @ 5V, 40 MHz @ 3V)
q
Power Control modes
Idle mode
Power-down mode
Power-off Flag
q
q
Dual Data Pointer
Asynchronous port reset
q
q
q
Once mode (On-chip Emulation)
Power supply: 4.5-5.5V, 2.7-5.5V
Temperature ranges: Commercial (0 to 70
o
C) and
Industrial (-40 to 85
o
C)
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1
(13.9 footprint)
q
Rev. A - Mar. 19, 1999
1
Preliminary