TS80C54X2 参数 Datasheet PDF下载

TS80C54X2/C58X2

TS87C54X2/C58X2

Table 4. CKCON Register

CKCON - Clock Control Register (8Fh)

7

-

Bit

Number

7

6

-

Bit

Mnemonic

-

5

-

4

-

3

-

Description

2

-

1

-

0

X2

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Reserved

The value read from this bit is indeterminate. Do not set this bit.

CPU and peripheral clock bit

Clear to select 12 clock periods per machine cycle (STD mode, F

OSC

=F

XTAL

/

2).

Set to select 6 clock periods per machine cycle (X2 mode, F

OSC

=F

XTAL

).

6

-

5

-

4

-

3

-

2

-

1

-

0

X2

Reset Value = XXXX XXX0b

Not bit addressable

For further details on the X2 feature, please refer to ANM072 available on the web (http://www.temic-semi.com)

Rev. B - Aug. 31, 1999

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