TSC87251G1A
4. Block Diagram
P3(A16) P2(A15–8) P1(A17)
P0(AD7–0)
PSEN#
PORTS 0–3
ALE/PROG#
UART
16–bit Memory Code
16–bit Memory Address
EA#/VPP
Event and Waveform
Controller
EPROM
OTPROM
16 Kbytes
RAM
1 Kbyte
Timers 0, 1 and 2
Bus Interface Unit
Peripheral Interface Unit
I
2
C/SPI/mWire
Controller
Watchdog Timer
24-bit Prog. Counter Bus
24-bit Data Address Bus
16-bit Inst. Bus
RST
8-bit Internal Bus
Power Monitoring
XTAL2
Clock Unit
Clock System Prescaler
XTAL1
8-bit Data Bus
Keyboard Interface
CPU
Interrupt Handler
Unit
VDD
VSS
VSS1
VSS2
Figure 1. TSC87251G1A Block Diagram
Rev. A
–
September 21, 1998
3