TSC87C52
New and Enhanced Features
In comparison to the original 80C52, the TSC87C52 implements some new and enhanced features. The new features
are the Power Off Flag, the ONCE mode and the ALE disabling. The enhanced features are located in the UART and
the Timer 2.
Power Off Flag
The Power Off Flag allows the user to distinguish between a ‘cold start’ reset and a ‘warm start’ reset.
A cold start reset is one that is coincident with VCC being turned on to the device after it was turned off. A warm start
reset occurs while VCC is still applied to the device and could be generated for example by an exit from Power Down.
The Power Off Flag (POF) is located in PCON at bit location 4 (see Table 1). POF is set by hardware when VCC rises
from 0 to its nominal voltage. The POF can be set or cleared by software allowing the user to determine the type of
reset.
Table 1 PCON – Power Control Register (87h)
7
SMOD1
6
SMOD0
5
–
4
POF
3
GF1
2
GF0
1
PD
0
IDL
Symbol
SMOD1
SMOD0
Description
Serial Port Mode bit 1, new name of SMOD bit
Set to select double baud rate in mode 1,2 or 3.
Serial Port Mode bit 0
Set to to select FE bit in SCON.
Clear to select SM0 bit in SCON.
Reserved
Do not write 1 in this bit.
Power Off Flag
Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set by software.
Clear by software to recognize next reset type.
General purpose Flag
Set by software for general purpose usage.
Clear by software for general purpose usage.
General purpose Flag
Set by software for general purpose usage.
Clear by software for general purpose usage.
Power Down mode bit
Set to enter power down mode.
Clear by hardware when reset occurs.
Idle mode bit
Set to enter idle mode.
Clear by hardware when interrupt or reset occur.
–
POF
GF1
GF0
PD
IDL
The reset value of PCON is 00XX 0000b.
ONCE Mode
The ONCE mode facilitates testing and debugging of systems using TSC87C52 without the TSC87C52 having to be
removed from the circuit. The ONCE mode is invoked by driving certain pins of the TSC87C52, the following sequence
must be exercised.
D
D
6
Pull ALE low while the device is in reset (RST high) and PSEN is high.
Hold ALE low as RST is deactivated.
MATRA MHS
Rev. C – 10 Sept 1997
Preliminary
TEMIC [ TEMIC SEMICONDUCTORS ]
