U2733B-C
A high gain amplifier (output pin: VD) which is
implemented in order to construct a loop filter as shown
in the application circuit can be switched off by means of
the I
2
C bus bit ‘OS’.
An internal lock detector checks if the phase difference of
the input signals of the phase detector is smaller than
approximately 250 ns in seven subsequent comparisons.
If phase lock is detected the open collector output pin
PLCK is set ‘H’ (logical value!). It should be noted that
the output current of this pin must be limited by external
circuitry as it is not limited internally. If the I
2
C bus bit
‘TRI’ is set ‘H’ the lock detector function is deactivated
and the logical value of the PLCK output is undefined.
Frequency Doubler
An internal frequency doubler provides a signal at twice
the frequency of the reference signal appearing at the
input pins REF and NREF. If the I
2
C bus bit ‘OFD’ = ‘H’
the current of its open collector outputs FDO and NFDO
is doubled. By means of the I
2
C bus bit ‘OFD’ the
frequency doubler function can be switched off.
As shown on page 15 (Integration in TEMIC DAB
Receiver Concept) the output signal of the frequency
doubler can be used in order to construct the LO signal of
the IF circuit (U2759B).
I
2
C Bus Interface
Via its I
2
C bus interface various functions can be
controlled by a microprocessor. These functions are
overviewed in the following sections ‘I
2
C bus instruction
codes’ and ‘I
2
C bus functions’. By means of the ADR pin
four different I
2
C bus addresses can be selected as
described in the section ‘Electrical characteristics’.
Switching Outputs
Six switching outputs controlled by the I
2
C bus bits
‘SWC’, ‘SWD’, ‘SWE’, ‘SWF’, ‘SWG’, ‘SWH’ can be
used for any switching task on the front end board. The
currents of these outputs are not limited internally. They
have to be limited by external circuitry.
4 (14)
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A1, 21-Aug-96
TEMIC [ TEMIC SEMICONDUCTORS ]
